Patents by Inventor Swetha Kamlapurkar
Swetha Kamlapurkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11657314Abstract: Techniques regarding microwave-to-optical quantum transducers are provided. For example, one or more embodiments described herein can include an apparatus that can include a microwave resonator on a dielectric substrate and adjacent to an optical resonator, and a photon barrier structure at least partially surrounding an optical resonator, wherein the photon barrier structure is configured to provide isolation of the microwave resonator from optical photons in the dielectric substrate outside the photon barrier structure.Type: GrantFiled: March 3, 2021Date of Patent: May 23, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chi Xiong, Jason S. Orcutt, Ricardo Alves Donaton, Stephen M. Gates, Swetha Kamlapurkar, Abram L Falk
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Publication number: 20230145368Abstract: Techniques regarding microwave-to-optical quantum transducers are provided. For example, one or more embodiments described herein can include an apparatus that can include a microwave resonator on a dielectric substrate and adjacent to an optical resonator, and a photon barrier structure at least partially surrounding an optical resonator, wherein the photon barrier structure is configured to provide isolation of the microwave resonator from optical photons in the dielectric substrate outside the photon barrier structure.Type: ApplicationFiled: March 3, 2021Publication date: May 11, 2023Inventors: Chi Xiong, Jason S. Orcutt, Ricardo Alves Donaton, Stephen M. Gates, SWETHA KAMLAPURKAR, Abram L Falk
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Publication number: 20220285818Abstract: Techniques regarding quantum transducers are provided. For example, one or more embodiments described herein can include an apparatus that can include a superconducting microwave resonator having a microstrip architecture that includes a dielectric layer positioned between a superconducting waveguide and a ground plane. The apparatus can also include an optical resonator positioned within the dielectric layer.Type: ApplicationFiled: March 3, 2021Publication date: September 8, 2022Inventors: Abram L. Falk, Chi Xiong, Swetha Kamlapurkar, Hanhee Paik, Jason S. Orcutt
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Patent number: 9087952Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: GrantFiled: April 7, 2014Date of Patent: July 21, 2015Assignee: International Business Machines CorporationInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Patent number: 8994177Abstract: A method for far back end of the line (FBEOL) protection of a semiconductor device includes forming a patterned layer over a back end of the line (BEOL) stack, depositing a first conformal protection layer on the patterned layer which covers horizontal surfaces of a top surface and sidewalls of openings formed in the patterned layer. A resist layer is patterned over the first conformal protection layer such that openings in the resist layer correspond with the openings in the patterned layer. The first conformal protection layer is etched through the openings in the resist layer to form extended openings that reach a stop position. The resist layer is removed, and a second conformal protection layer is formed on the first conformal protection layer and on sidewalls of the extended openings to form an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack.Type: GrantFiled: August 15, 2013Date of Patent: March 31, 2015Assignee: International Business Machines CorporationInventors: Tymon Barwicz, Robert L. Bruce, Swetha Kamlapurkar
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Patent number: 8932956Abstract: A method for far back end of the line (FBEOL) protection of a semiconductor device includes forming a patterned layer over a back end of the line (BEOL) stack, depositing a first conformal protection layer on the patterned layer which covers horizontal surfaces of a top surface and sidewalls of openings formed in the patterned layer. A resist layer is patterned over the first conformal protection layer such that openings in the resist layer correspond with the openings in the patterned layer. The first conformal protection layer is etched through the openings in the resist layer to form extended openings that reach a stop position. The resist layer is removed, and a second conformal protection layer is formed on the first conformal protection layer and on sidewalls of the extended openings to form an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack.Type: GrantFiled: December 4, 2012Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Tymon Barwicz, Robert L. Bruce, Swetha Kamlapurkar
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Publication number: 20140217485Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: ApplicationFiled: April 7, 2014Publication date: August 7, 2014Applicant: International Business Machines CorporationInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Patent number: 8765536Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: GrantFiled: September 28, 2012Date of Patent: July 1, 2014Assignee: International Business Machines CorporationInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Publication number: 20140151898Abstract: A method for far back end of the line (FBEOL) protection of a semiconductor device includes forming a patterned layer over a back end of the line (BEOL) stack, depositing a first conformal protection layer on the patterned layer which covers horizontal surfaces of a top surface and sidewalls of openings formed in the patterned layer. A resist layer is patterned over the first conformal protection layer such that openings in the resist layer correspond with the openings in the patterned layer. The first conformal protection layer is etched through the openings in the resist layer to form extended openings that reach a stop position. The resist layer is removed, and a second conformal protection layer is formed on the first conformal protection layer and on sidewalls of the extended openings to form an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack.Type: ApplicationFiled: August 15, 2013Publication date: June 5, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tymon Barwicz, Robert L. Bruce, Swetha Kamlapurkar
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Publication number: 20140151894Abstract: A method for far back end of the line (FBEOL) protection of a semiconductor device includes forming a patterned layer over a back end of the line (BEOL) stack, depositing a first conformal protection layer on the patterned layer which covers horizontal surfaces of a top surface and sidewalls of openings formed in the patterned layer. A resist layer is patterned over the first conformal protection layer such that openings in the resist layer correspond with the openings in the patterned layer. The first conformal protection layer is etched through the openings in the resist layer to form extended openings that reach a stop position. The resist layer is removed, and a second conformal protection layer is formed on the first conformal protection layer and on sidewalls of the extended openings to form an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack.Type: ApplicationFiled: December 4, 2012Publication date: June 5, 2014Applicant: International Business Machines CorporationInventors: Tymon Barwicz, Robert L. Bruce, Swetha Kamlapurkar
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Publication number: 20140091374Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov