Patents by Inventor Swye N. Lee

Swye N. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5038368
    Abstract: A redundancy circuit that substitutes a redundant circuit element for a corresponding defective circuit element includes a severable fuse link and a redundancy control circuit with an input connected to the severable fuse link and first and second outputs. When the fuse link is intact, the first output of the redundancy control circuit is in a first state and the second output is in a second state. When the fuse link is severed, a momentary signal on power up places the first output in the second state and the second output in the first state. The first output is coupled to the one circuit element and the second output is coupled to the corresponding redundant circuit element. If the one circuit element is defective, it is disabled by severing the fuse link.
    Type: Grant
    Filed: February 2, 1990
    Date of Patent: August 6, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Swye N. Lee
  • Patent number: 5012497
    Abstract: A frequency divider receives a first frequency signal and at least one clock signal of a sub-multiple of the first frequency. The first frequency signal charges a storage terminal once each first frequency cycle and the sub-multiple frequency signal discharges the storage temrinal once each sub-multiple frequency cycle. The discharged storage terminal sets the frequency divider output which is reset by the first frequency signal when the storage terminal is discharged. The sub-multiple frequency clock signal is employed to control the storage terminal instead of a feedback path from the output to increase the operating frequency of the divider.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: April 30, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Swye N. Lee
  • Patent number: 5001481
    Abstract: A circuit that compensates for threshold voltage variations in a large array of deposited thin film MOS transistors includes a threshold voltage compensation transistor for a subset of the deposited analog thin film transistors having a prescribed source to gate threshold voltage. The source electrode of the threshold voltage compensation transistor receives a voltage corresponding to the maximum threshold voltage in the large array. The gate and drain electrodes of the threshold voltage compensation transistor are connected together and to one terminal of a capacitor. The other terminal of the capacitor is connected to a second voltage and the capacitor is momentarily discharged to set the threshold voltage compensation transistor gate and drain electrodes to the second voltage. The gate and drain electrodes of the threshold voltage compensation transistor are connected to the gate electrodes of the subset of analog thin film transistors.
    Type: Grant
    Filed: January 30, 1990
    Date of Patent: March 19, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Swye N. Lee