Patents by Inventor Syam PRASAD
Syam PRASAD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11537542Abstract: Disclosed approaches eliminate involving a bus interface in polling by the host computer system and the peripheral component for events to coordinate direct memory access (DMA) transfers. The host polls main memory for DMA events communicated by the peripheral component, and the peripheral component polls local registers for DMA addresses to initiate DMA transfers. DMA transfers are initiated by the host storing main memory addresses in the local registers of the peripheral component, and DMA events generated by the peripheral component are stored in the main memory.Type: GrantFiled: January 27, 2021Date of Patent: December 27, 2022Assignee: MARVELL ASIA PTE LTD.Inventors: Syam Prasad, Amarnath Vishwakarma, Chidamber Kulkarni, Prasanna Sukumar
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Patent number: 11429595Abstract: A database proxy includes a computing device and a hardware-accelerated database proxy module. The computing device and the database proxy module. The database proxy is configured to receive a write request from a client; store the write request in a commit log in a first non-volatile memory device; in response to storing the write request in the commit log, return to the client a signal acknowledging success of the write request; store the write request in a cache in a second non-volatile memory device; cause the write request to be written in a database store; and based on a first determination that the write request is stored in the cache and on a second determination that the write request is written in the database store, remove the write request from the commit log.Type: GrantFiled: April 1, 2020Date of Patent: August 30, 2022Assignee: MARVELL ASIA PTE LTD.Inventors: Amarnath Vishwakarma, Syam Prasad, Murali Krishna, Ashutosh Sharma, Kuladeep Sai Reddy, Vaibhav Jain, Prasanna Sukumar, Chidamber Kulkarni, Prasanna Sundararajan
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Patent number: 11218881Abstract: In various embodiments, a wireless device processor may determine a threat score for a first cell, determine whether the first cell threat score is below a first threat score threshold, update a good neighbor cell data structure using neighbor cell information from the first cell in response to determining that the first cell threat score is below the first threat score threshold, performing cell reselection to a second cell, determine whether the second cell transmits a system information block message indicating fake neighbor cell information, and increase a threat score for the second cell in response to determining that the second cell provides the SIB message indicating fake neighbor cell information and that a good neighbor cell data structure includes an indication of one or more good neighbor cells that are within the time threshold and the location threshold and doing countermeasures in a response to the determination.Type: GrantFiled: October 14, 2020Date of Patent: January 4, 2022Assignee: QUALCOMM IncorporatedInventors: Subrato Kumar De, Sivasubramanian Ramalingam, Ankur Bhattacharjee, Rahul Chandrashekar Sahukar, Muralidharan Murugan, Mattias Kaulard Huber, Krishna Ram Budhathoki, Syam Prasad Reddy Battula, Sattwik Nandi, Harshpreet Singh, Gaurav Singh, Rishika Tindola, Arvind Vardarajan Santhanam, Nitin Pant
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Publication number: 20210311930Abstract: A database proxy includes a computing device and a hardware-accelerated database proxy module. The computing device and the database proxy module. The database proxy is configured to receive a write request from a client; store the write request in a commit log in a first non-volatile memory device; in response to storing the write request in the commit log, return to the client a signal acknowledging success of the write request; store the write request in a cache in a second non-volatile memory device; cause the write request to be written in a database store; and based on a first determination that the write request is stored in the cache and on a second determination that the write request is written in the database store, remove the write request from the commit log.Type: ApplicationFiled: April 1, 2020Publication date: October 7, 2021Inventors: Amarnath VISHWAKARMA, Syam PRASAD, Murali KRISHNA, Ashutosh SHARMA, Kuladeep Sai REDDY, Vaibhav JAIN, Prasanna SUKUMAR, Chidamber KULKARNI, Prasanna SUNDARARAJAN
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Patent number: 10628214Abstract: The embodiments herein provide a method for scheduling an entity in a multi-core processor system including a big-core processor, and a little-core processor. The method includes detecting, by a scheduler, that a load contribution of the entity exceeds a load threshold. Further, the method includes determining, by the scheduler, whether the entity is one of a background entity, an IO intensive entity, a non-background entity, and a non-IO intensive entity based on at least one parameter. Further, the method includes instructing, by the scheduler, one of to schedule the entity on a little-core processor when the entity is at least one of the background entity and the IO intensive entity; and to schedule the entity on the big-core processor when the entity is at least one of the non-background entity and the non-IO intensive entity.Type: GrantFiled: June 1, 2016Date of Patent: April 21, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Aniruddha Banerjee, Sharan Kumar Allur, Syam Prasad Kuncha
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Patent number: 10308611Abstract: The present invention provides a process for the preparation of crystalline Lorcaserin hydrochloride hemihydrate of Formula (Ia), which comprises, Formula (Ia) (i) providing a solution of Lorcaserin base in a solvent; (ii) if water is present, removing water from the reaction mixture; (iii) adding hydrogen chloride to the reaction mixture; (iv) combining the reaction mixture with a suitable anti-solvent; and (v) isolating the crystalline Lorcaserin hydrochloride hemihydrate of Formula (Ia).Type: GrantFiled: March 18, 2016Date of Patent: June 4, 2019Assignee: Aurobindo Pharma LtdInventors: Sukumar Nandi, Akkina Naresh, Syam Prasad Reddy Rao Annareddy, Gona Bala Narsimha Reddy, Meenakshi Sunderam Sivakumaran
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Publication number: 20180260243Abstract: The embodiments herein provide a method for scheduling an entity in a multi-core processor system including a big-core processor, and a little-core processor. The method includes detecting, by a scheduler, that a load contribution of the entity exceeds a load threshold. Further, the method includes determining, by the scheduler, whether the entity is one of a background entity, an IO intensive entity, a non-background entity, and a non-IO intensive entity based on at least one parameter. Further, the method includes instructing, by the scheduler, one of to schedule the entity on a little-core processor when the entity is at least one of the background entity and the IO intensive entity; and to schedule the entity on the big-core processor when the entity is at least one of the non-background entity and the non-IO intensive entity.Type: ApplicationFiled: June 1, 2016Publication date: September 13, 2018Inventors: Aniruddha BANERJEE, Sharan Kumar ALLUR, Syam Prasad KUNCHA
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Publication number: 20180194734Abstract: The present invention provides a process for the preparation of crystalline Lorcaserin hydrochloride hemihydrate of Formula (1a), which comprises, Formula (1a) (i) providing a solution of Lorcaserin base in a solvent; (ii) if water is present, removing water from the reaction mixture; (iii) adding hydrogen chloride to the reaction mixture; (iv) combining the reaction mixture with a suitable anti-solvent; and (v) isolating the crystalline Lorcaserin hydrochloride hemihydrate of Formula (1a).Type: ApplicationFiled: March 18, 2016Publication date: July 12, 2018Applicant: Aurobindo Pharma LtdInventors: Sukumar Nandi, Akkina Naresh, Syam Prasad Reddy Rao Annareddy, Gona Bala Narsimha Reddy, Meenakshi Sunderam Sivakumaran
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Patent number: 8614189Abstract: The present invention provides biocompatible composite materials that can be fabricated into a scaffold having properties suitable for bone repair and regeneration. These scaffolds have sufficient mechanical strength to be useful for the repair and regeneration of cortical bone.Type: GrantFiled: September 21, 2009Date of Patent: December 24, 2013Assignee: University of ConnecticutInventors: Cato T. Laurencin, Syam Prasad Nukavarapu, Sangamesh G. Kumbar
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Publication number: 20100249931Abstract: The invention provides a scaffold for bone or cartilage replacement, in which the scaffold is fabricated from naturally derived polymers. In one embodiment the invention provides a bone replacement scaffold, wherein the scaffold comprises sintered polysaccharide microspheres. In a particular embodiment the invention provides a bone replacement scaffold, in which the scaffold comprises polysaccharide microspheres comprising ethyl cellulose microspheres and/or cellulose acetate microspheres. The invention further includes methods of making bone replacement scaffolds and methods of treating bone injury in an animal.Type: ApplicationFiled: February 23, 2010Publication date: September 30, 2010Applicants: UNIVERSITY OF CONNECTICUT, University of VirginiaInventors: Cato T. Laurencin, Sangamesh G. Kumbar, Syam Prasad Nukavarapu, Roshan James
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Publication number: 20100075904Abstract: The present invention provides biocompatible composite materials that can be fabricated into a scaffold having properties suitable for bone repair and regeneration. These scaffolds have sufficient mechanical strength to be useful for the repair and regeneration of cortical bone.Type: ApplicationFiled: September 21, 2009Publication date: March 25, 2010Applicant: University of ConnecticutInventors: Cato T. Laurencin, Syam Prasad Nukavarapu, Sangamesh G. Kumbar
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Patent number: 7120172Abstract: The Radio Link Protocol framing system provides the mobile wireless station set with high speed data transmission capability by using the Dedicated Control Channel, which comprises a stream of 20 msec frames, to carry a single 18 byte Radio Link Protocol frame and the Supplementary Channel, which comprises a stream of 20 msec frames, to carry many 18 byte Radio Link Protocol frames to accommodate high-speed bursts of data. The Radio Link Protocol framing system packs the Radio Link Protocol frames within the Supplementary Channel (SCH-RLP frames) to maximize the data processing efficiency. The Radio Link Protocol framing system functions to package the subscriber's data into predetermined frame format consisting of Core Units, which are packed, as needed, into one SCH-RLP frame. The data capacity is limited solely by the Supplementary Channel burst capacity.Type: GrantFiled: September 15, 2000Date of Patent: October 10, 2006Assignee: Lucent Technologies Inc.Inventors: Syam Prasad Aribindi, Tejaskumar R. Patel, Tomas Duncan