Patents by Inventor Syed Ahmed AAMIR

Syed Ahmed AAMIR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240255559
    Abstract: A power detector for measuring the radio frequency (RF) power of RF signals generated by a transmitter or a power amplifier of a transmitter is connected between two diodes of electrostatic discharge (ESD) circuitry that is connected to a signal pathway utilized to transmit the RF signals.
    Type: Application
    Filed: January 27, 2023
    Publication date: August 1, 2024
    Inventors: Syed Ahmed Aamir, Timo W. Gossmann
  • Patent number: 12047090
    Abstract: A RFDAC comprising an array of unit-cell power amplifiers, wherein the array comprises a first plurality of unit-cell power amplifiers, a second plurality of unit-cell power amplifiers, and a third plurality of unit-cell power amplifiers; wherein the first plurality of unit-cell power amplifiers are configured to operate in accordance with a first clock; wherein the second plurality of unit-cell power amplifiers are configured to operate in accordance with a second clock; wherein the third plurality of unit-cell power amplifiers are configured to operate in accordance with the first clock or the second clock. The RFDAC also comprising a decoder configured to output the first clock and an enablement signal of the first clock for the first plurality; output the second clock and an enablement signal of the second clock for the second plurality; distinguish between the first clock and the second clock for the third plurality.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: July 23, 2024
    Assignee: INTEL CORPORATION
    Inventors: Filipe De Andrade Tabarani Santos, Andreas Roithmeier, Timo Gossmann, Syed Ahmed Aamir, Rinaldo Zinke
  • Publication number: 20220294465
    Abstract: A RFDAC comprising an array of unit-cell power amplifiers, wherein the array comprises a first plurality of unit-cell power amplifiers, a second plurality of unit-cell power amplifiers, and a third plurality of unit-cell power amplifiers; wherein the first plurality of unit-cell power amplifiers are configured to operate in accordance with a first clock; wherein the second plurality of unit-cell power amplifiers are configured to operate in accordance with a second clock; wherein the third plurality of unit-cell power amplifiers are configured to operate in accordance with the first clock or the second clock. The RFDAC also comprising a decoder configured to output the first clock and an enablement signal of the first clock for the first plurality; output the second clock and an enablement signal of the second clock for the second plurality; distinguish between the first clock and the second clock for the third plurality.
    Type: Application
    Filed: September 27, 2019
    Publication date: September 15, 2022
    Inventors: Filipe DE ANDRADE TABARANI SANTOS, Andreas ROITHMEIER, Timo GOSSMANN, Syed Ahmed AAMIR, Rinaldo ZINKE