Patents by Inventor Syed Amir Aftab

Syed Amir Aftab has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9143156
    Abstract: A system configured to receive bits of data. The bits of data include most significant bits and least significant bits. The system includes a first converter, a voltage-to-current converter, a current converter, and a current-to-voltage converter. The first converter is configured to generate input voltages. The input voltages represent the most significant bits of the bits of data. The voltage-to-current converter is configured to convert a selected one of the input voltages to a first current. The current converter is configured to, based on least significant bits of the bits of data, interpolate or divide the first current to generate a second current. The current-to-voltage converter is configured to convert the second current to an output voltage. The output voltage represents the most significant bits and the least significant bits.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: September 22, 2015
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Syed Amir Aftab
  • Patent number: 8907831
    Abstract: A system includes an N-bit digital-to-analog converter and an M-bit sub-digital-to-analog converter. The N-bit digital-to-analog converter includes 2N resistances connected in series across first and second reference voltages and converts N most significant bits of B bits of data. The M-bit sub-digital-to-analog converter converts M least significant bits of the B bits of data. The M-bit sub-digital-to-analog converter includes a first converter that converts a voltage across one of the 2N resistances to a first current, a current-mode digital-to-analog converter that interpolates the first current and outputs a second current, and a second converter that converts the second current to an output voltage representing the N most significant bits and the M least significant bits of the B bits of data.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: December 9, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Syed Amir Aftab
  • Patent number: 6369742
    Abstract: A device and technique for selective over-ranging provides for the folding of signals in an input signal range such that the folded signals in the center of the input signal range are folded NF times while the folded signals at the lower and upper extremes of the input signal range are folded NFf+1 times. One embodiment includes an over-ranging lower pre-amplifier group (230), a center pre-amplifier group (240) and an over-ranging upper pre-amplifier group (250).
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: April 9, 2002
    Assignee: Motorola, Inc.
    Inventors: Daniel D. Alexander, Syed Amir Aftab