Abstract: An apparatus for routing power between a set of power supply taps of an automated tester and power connections on an integrated circuit under test, where the integrated circuit belongs to a family of integrated circuits that have a common power connection layout and different power connection voltage requirements. An interface board having first electrical contacts disposed in the common power connection layout makes electrical connections to the power connections of all integrated circuits belonging to the family of integrated circuits. The first electrical contacts are electrically routed to second electrical contacts disposed in a standardized configuration. A power personality card having third electrical contacts makes electrical connections to the second electrical contacts of the interface board.

Abstract: A method for improving the fault coverage of functional tests for integrated circuits by establishing a design-specific low voltage functional screening procedure. In the disclosed embodiment of the invention, a reduced voltage test threshold is established by comparing the results of an iterative test procedure executed on a set of known good integrated circuits and integrated circuits which have passed traditional functional test programs but manifested problems in the field. For a given device under test, the iterative procedure commences by applying a system clock and nominal power supply voltage. A set of functional test vectors is then executed on the device using automated test equipment (ATE). The results are compared with expected test results to determine if the device is a passing device under the initial test conditions. If so, the power supply voltage is decremented by a predetermined value and the test process is repeated.