Abstract: One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint, which includes a checkpointed version of the register file. Next, the system defers the instruction, which involves storing the instruction along with any resolved source operands for the instruction into a deferred buffer. The system then executes subsequent instructions in an execute-ahead mode which operates on a future version of the register file, wherein instructions that cannot be executed because of unresolved data dependencies are deferred, and wherein other non-deferred instructions are executed in program order.