Patents by Inventor Syed Ijlal A. Shah

Syed Ijlal A. Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210149836
    Abstract: Systems and methods are disclosed for broadcasting transactions, inside a network-on-chip (NoC), from a master to multiple slaves and for receiving responses. The transactions originate from a master and are send, using the NoC, to broadcast adapters using a special range of addresses. The broadcast adapters receive the transactions from the master. The broadcast adapters duplicate the transactions and send the duplicated transaction to multiple slaves. The slaves send a response, which is transported back by the NoC to the corresponding master.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 20, 2021
    Applicant: ARTERIS, INC.
    Inventors: Syed Ijlal SHAH, John CODDINGTON, Benoit de LESCURE
  • Patent number: 7751443
    Abstract: A switching device and methods thereof are disclosed. One of the methods includes an arbitration process for communicating a data payload between interface modules. A first intra-chassis packet is sent by a source interface module to the target interface module. The first intra-chassis packet represents a request for permission to transmit a data payload to the target interface. A second intra-chassis packet is received at the source interface module from the target interface module indicating whether the request has been approved. If the request is approved, the source interface module sends a third intra-chassis packet comprising at least a portion of the data payload to the target interface module.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: July 6, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Syed Ijlal A. Shah
  • Publication number: 20080165768
    Abstract: A switching device and methods thereof are disclosed. One of the methods includes an arbitration process for communicating a data payload between interface modules. A first intra-chassis packet is sent by a source interface module to the target interface module. The first intra-chassis packet represents a request for permission to transmit a data payload to the target interface. A second intra-chassis packet is received at the source interface module from the target interface module indicating whether the request has been approved. If the request is approved, the source interface module sends a third intra-chassis packet comprising at least a portion of the data payload to the target interface module.
    Type: Application
    Filed: January 5, 2007
    Publication date: July 10, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Syed Ijlal A. Shah