Patents by Inventor Syed Khalid

Syed Khalid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100074268
    Abstract: In one embodiment, a network node of a secondary network receives a message from a multi-homed network. The message includes a block of network addresses allocated to the multi-homed network. It is determined that a primary network has advertised an aggregated route including the multi-homed network's allocated block of network addresses. Advertisements of the multi-homed network's allocated block of network addresses are suppressed, after a determination that the primary network has advertised an aggregated route including the multi-homed network's allocated block of network addresses. It may be later be determined that the multi-homed network has lost network connectivity via the primary network. Advertisements of the multi-homed network's allocated block of network addresses are unsuppressed, after a determination that the multi-homed network has lost network connectivity via the primary network.
    Type: Application
    Filed: November 24, 2009
    Publication date: March 25, 2010
    Applicant: CISCO TECHNOLOGY, INC.
    Inventor: Syed Khalid Raza
  • Patent number: 7630392
    Abstract: A technique for implementing route aggregation in a computer network containing a multi-homed customer site connected to primary and second networks, which in turn are both connected to a common “backbone” network. According to the technique, the primary network allocates a block of network addresses for the customer site, and the customer site notifies the secondary network of its allocated addresses. The secondary network first determines whether the primary network has already advertised an aggregated route which incorporates the customer site's route. If so, the secondary network “suppresses” (i.e., does not advertise) the customer site's route. The secondary network only “unsuppresses” the customer site's route if it detects that the primary network has lost connectivity to the customer site and/or the backbone network.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: December 8, 2009
    Assignee: Cisco Technology, Inc.
    Inventor: Syed Khalid Raza
  • Publication number: 20080258965
    Abstract: Systems and methods for obtaining corrected time information in a GPS enabled device connected to a mobile handset via a short-range wireless network, such as a Bluetooth Piconet. The mobile handset includes a GPS time and a network clock synchronized with a network clock in a short-range wireless network interface in the GPS enabled device. The GPS enabled device may send requests for time information to the mobile handset. The mobile handset receives the request and latches the network clock time and the GPS time. The captured network clock time and GPS times are sent to the GPS enabled device in response to the request. The GPS enable device substracts the captured network clock time from its own network clock time and adds the difference to the captured GPS time to obtain a corrected GPS time.
    Type: Application
    Filed: April 20, 2007
    Publication date: October 23, 2008
    Inventor: Syed Khalid Azim
  • Publication number: 20080080494
    Abstract: A system for hiding transit-only interfaces in a network. When a routing system is advertising a transit-only interface, the advertisement is marked to indicate the address is a transit-only interface. A routing system receives the advertisement and detects the identifier of the transit-only interface and does not store the address in the Router Information Base of the routing system.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Yi Yang, Alvaro E. Retana, James L. Ng, Abhay Roy, Alfred C. Lindem, Sina Mirtorabi, Timothy M. Gage, Syed Khalid Raza
  • Patent number: 7289145
    Abstract: An image processor system for a charge coupled device (CCD) or CMOS imaging system includes a correlated double sample and variable gain (CDSVGA) circuit for receiving data from a CCD system and an automatic gain control (AGC) circuit which first controls gain by adjusting said CCD system and then for yet a higher gain level makes gain adjustments in said CDSVGA circuit AND a digital gain circuit to produce a combined target gain level. A processing system for an imager device includes a camera system for producing an imager signal, a correlated double sample (CDS) circuit for receiving data from an imager, a variable gain amplifier (VGA), an analog-to-digital converter (ADC) coupled to said CDS circuit, a digital gain circuit (DGC) coupled to said ADC, and an automatic gain control (AGC) circuit coupled to said DGC for controlling the CDS circuit and the DGC.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: October 30, 2007
    Assignee: Cirrus Logic, Inc.
    Inventors: Sandra Marie Johnson, Shih-Chung Chao, Nadi Rafik Itani, Caiyi Wang, Brannon Craig Harris, Ash Prabala, Douglas R. Holberg, Alan Hansford, Syed Khalid Azim, David R. Welland
  • Publication number: 20060067821
    Abstract: An airfoil having a root, a tip, and an outer surface for pressuring air flowable thereover. The outer surface includes one or more slots elongate in a direction selected to preclude or reduce circulation within the slots, and the one or more slots are configured to bleed a boundary layer from the outer surface to the tip utilizing one or more passageways within the airfoil.
    Type: Application
    Filed: September 28, 2004
    Publication date: March 30, 2006
    Inventors: Aspi Wadia, Peter Szucs, Syed Khalid, Peter Wood, Kevin Kirtley, Xiaoyue Liu
  • Publication number: 20020176009
    Abstract: An image processor system for a charge coupled device (CCD) or CMOS imaging system includes a correlated double sample and variable gain (CDSVGA) circuit for receiving data from a CCD system and an automatic gain control (AGC) circuit which first controls gain by adjusting said CCD system and then for yet a higher gain level makes gain adjustments in said CDSVGA circuit AND a digital gain circuit to produce a combined target gain level. A processing system for an imager device includes a camera system for producing an imager signal, a correlated double sample (CDS) circuit for receiving data from an imager, a variable gain amplifier (VGA), an analog-to-digital converter (ADC) coupled to said CDS circuit, a digital gain circuit (DGC) coupled to said ADC, and an automatic gain control (AGC) circuit coupled to said DGC for controlling the CDS circuit and the DGC.
    Type: Application
    Filed: March 27, 2002
    Publication date: November 28, 2002
    Inventors: Sandra Marie Johnson, Shih-Chung Chao, Nadi Rafik Itani, Caiyi Wang, Brannon Craig Harris, Ash Prabala, Douglas R. Holberg, Alan Wayne Hansford, Syed Khalid Azim, David R. Welland