Abstract: A semiconductor device includes: (i) a substrate; (ii) a first elongated semiconductor structure extending in a first horizontal direction along the substrate and protruding vertically above the substrate, wherein a first set of source/drain regions are formed on the first semiconductor structure; (iii) a second elongated semiconductor structure extending along the substrate in parallel to the first semiconductor structure and protruding vertically above the substrate, wherein a second set of source/drain regions are formed on the second semiconductor structure; and (iv) a first set of source/drain contacts formed on the first set of source/drain regions, wherein a first source/drain contact of the first set of source/drain contacts includes: (a) a vertically extending contact portion formed directly above a first source/drain region of the first set of source/drain regions, and (b) a via landing portion protruding horizontally from the vertically extending contact portion in a direction towards the second se

Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of defining routing tracks for a standard cell semiconductor device, and to the standard cell semiconductor device fabricated using the method. In one aspect, a method of defining routing tracks in a target layer over a standard cell semiconductor device includes forming mandrels and forming a first set and a second set of spacers for defining the routing tracks. The standard cell semiconductor device includes a device layer and the routing tracks for contacting a device layer. The routing tracks include at least two pairs of off-center routing tracks, a central routing track arranged between the pairs of off-center routing tracks, and at least two edge tracks arranged on opposing sides of the at least two pairs of off-center routing tracks.

Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of defining routing tracks for a standard cell semiconductor device, and to the standard cell semiconductor device fabricated using the method. In one aspect, a method of defining routing tracks in a target layer over a standard cell semiconductor device includes forming mandrels and forming a first set and a second set of spacers for defining the routing tracks. The standard cell semiconductor device includes a device layer and the routing tracks for contacting a device layer. The routing tracks include at least two pairs of off-center routing tracks, a central routing track arranged between the pairs of off-center routing tracks, and at least two edge tracks arranged on opposing sides of the at least two pairs of off-center routing tracks.

Abstract: A semiconductor device includes: (i) a substrate; (ii) a first elongated semiconductor structure extending in a first horizontal direction along the substrate and protruding vertically above the substrate, wherein a first set of source/drain regions are formed on the first semiconductor structure; (iii) a second elongated semiconductor structure extending along the substrate in parallel to the first semiconductor structure and protruding vertically above the substrate, wherein a second set of source/drain regions are formed on the second semiconductor structure; and (iv) a first set of source/drain contacts formed on the first set of source/drain regions, wherein a first source/drain contact of the first set of source/drain contacts includes: (a) a vertically extending contact portion formed directly above a first source/drain region of the first set of source/drain regions, and (b) a via landing portion protruding horizontally from the vertically extending contact portion in a direction towards the second se

Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of defining routing tracks for a standard cell semiconductor device, and to the standard cell semiconductor device fabricated using the method. In one aspect, a method of defining routing tracks in a target layer over a standard cell semiconductor device includes forming mandrels and forming a first set and a second set of spacers for defining the routing tracks. The standard cell semiconductor device includes a device layer and the routing tracks for contacting a device layer. The routing tracks include at least two pairs of off-center routing tracks, a central routing track arranged between the pairs of off-center routing tracks, and at least two edge tracks arranged on opposing sides of the at least two pairs of off-center routing tracks.