Patents by Inventor Syed R. Rahman

Syed R. Rahman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7827360
    Abstract: A method and device for locking a cache line of a cache is disclosed. The method includes automatically changing a state of a cache line from a valid locked state to an invalid locked state in response to receiving an indication that a memory location external to the cache and corresponding to the cache line is associated with an access request by a processor or other data access module. Thus, the locked state of a cache line is maintained even after data in the locked cache line is invalidated. By maintaining the invalid locked state, the cache line is not available for reallocation by the cache. This allows locked cache lines that become invalidated to remain locked without additional software overhead to periodically determine whether the lock has been lost due to invalidation of the cache line.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: November 2, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Syed R. Rahman, David F. Greenberg, Kathryn C. Stacer, Klas M. Bruce, Matt B. Smittle, Michael D. Snyder, Gary L. Whisenhunt
  • Publication number: 20090037666
    Abstract: A method and device for locking a cache line of a cache is disclosed. The method includes automatically changing a state of a cache line from a valid locked state to an invalid locked state in response to receiving an indication that a memory location external to the cache and corresponding to the cache line is associated with an access request by a processor or other data access module. Thus, the locked state of a cache line is maintained even after data in the locked cache line is invalidated. By maintaining the invalid locked state, the cache line is not available for reallocation by the cache. This allows locked cache lines that become invalidated to remain locked without additional software overhead to periodically determine whether the lock has been lost due to invalidation of the cache line.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 5, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Syed R. Rahman, David F. Greenberg, Kathryn C. Stacer, Klas M. Bruce, Matt B. Smittle, Michael D. Snyder, Gary L. Whisenhunt