Patents by Inventor Sylvia Winter

Sylvia Winter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for generating chip stacks
    Patent number: 7087502
    Abstract: Disclosed is a method for generating chip stacks during the production of chips from wafers, the chips located on the wafer being separated from one another, the wafer being ground thin and the chips being stacked to form chip stacks, the chips being checked for the purpose of a functional check, characterized in that the chips are checked in a first work step, that adhesive material is applied on the good chips, whereas the bad chips are not provided with adhesive material, that the wafer is assembled and ground thin afterwards and that the bad chips are subsequently removed and replaced by good chips.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: August 8, 2006
    Assignees: Disco Hi-Tec Europe GmbH, Infineon Technologies AG
    Inventors: Karl Heinz Priewasser, Sylvia Winter
  • Method for generating chip stacks
    Publication number: 20050095733
    Abstract: Disclosed is a method for generating chip stacks during the production of chips from wafers, the chips located on the wafer being separated from one another, the wafer being ground thin and the chips being stacked to form chip stacks, the chips being checked for the purpose of a functional check, characterised in that the chips are checked in a first work step, that adhesive material is applied on the good chips, whereas the bad chips are not provided with adhesive material, that the wafer is assembled and ground thin afterwards and that the bad chips are subsequently removed and replaced by good chips.
    Type: Application
    Filed: September 16, 2004
    Publication date: May 5, 2005
    Inventors: Karl Priewasser, Sylvia Winter
  • Method of applying a bottom surface protective coating to a wafer, and wafer dicing method
    Patent number: 6709953
    Abstract: The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: March 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Barbara Vasquez, David Wallis, Sylvia Winter
  • Method of applying a bottom surface protective coating to a wafer, and wafer dicing method
    Publication number: 20030143818
    Abstract: The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: Barbara Vasquez, David Wallis, Sylvia Winter