Patents by Inventor Syu-Siang Lee
Syu-Siang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11455211Abstract: A power control system for a server is disclosed. The power control system includes a power supply device, configured to provide a main power source and a standby power source; at least a hot swap controller, coupled to the power supply device; at least a peripheral unit, coupled to the power supply device via the hot swap controller; and a motherboard, coupled to the power supply device via the hot swap controller, and includes a logic unit, configured to disable or enable the hot swap controller; and a baseboard management controller, coupled to the logic unit, configured to transmit an AC power cycle signal to the logic unit to disable the hot swap controller, and to transmit a reboot signal to the logic unit to enable the hot swap controller.Type: GrantFiled: December 17, 2020Date of Patent: September 27, 2022Assignee: Wistron CorporationInventor: Syu-Siang Lee
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Patent number: 11442518Abstract: An extended system includes at least one peripheral component interconnect express (PCIE) connector and a control device. The PCIE connector is suitable for connecting to at least one server device. The control device is connected to PCIE connector. According to at least one working voltage generated by the server device, the control device turns on the extended system and ignores a power control signal generated by the extended system, or the control unit generates at least one wakeup signal according to the power control signal generated by the extended system and transmits the wakeup signal to the server device, so that the server device may turn on and generate a working voltage.Type: GrantFiled: July 19, 2019Date of Patent: September 13, 2022Assignee: WISTRON CORP.Inventors: Zh-Wei Zhang, Syu-Siang Lee
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Publication number: 20220114056Abstract: A power control system for a server is disclosed. The power control system includes a power supply device, configured to provide a main power source and a standby power source; at least a hot swap controller, coupled to the power supply device; at least a peripheral unit, coupled to the power supply device via the hot swap controller; and a motherboard, coupled to the power supply device via the hot swap controller, and includes a logic unit, configured to disable or enable the hot swap controller; and a baseboard management controller, coupled to the logic unit, configured to transmit an AC power cycle signal to the logic unit to disable the hot swap controller, and to transmit a reboot signal to the logic unit to enable the hot swap controller.Type: ApplicationFiled: December 17, 2020Publication date: April 14, 2022Inventor: Syu-Siang Lee
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Patent number: 11228201Abstract: A power generating apparatus includes a power supply, a first sub-end circuit, a second sub-end circuit and an integrated signal generator. The first and second sub-end circuits respectively generate first and second sub-end standby power. The first sub-end circuit receives a first integrated control signal. The second sub-end circuit receives a second integrated control signal. The first sub-end circuit cuts off the first sub-end standby power according to the first integrated control signal and turns on the first sub-end standby power again after a first delay time. The second sub-end circuit cuts off the second sub-end standby power according to the second integrated control signal, and turns on the second sub-end standby power again after a second delay time. The integrated signal generator generates the first and second integrated control signals.Type: GrantFiled: July 19, 2019Date of Patent: January 18, 2022Assignee: Wistron CorporationInventors: Zh-Wei Zhang, Syu-Siang Lee
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Patent number: 11132189Abstract: A firmware update device and a firmware update method are provided. The firmware update device includes a first storage medium, a baseboard management controller (BMC), a retimer card, and a processor. The first storage medium stores firmware configuration data. The BMC is coupled to the first storage medium, wherein the BMC is configured to update the firmware configuration data. The retimer card stores a card identifier and firmware. The processor is coupled to the first storage medium and the BMC, wherein the processor detects the card identifier of the retimer card and update the firmware of the retimer card according to the firmware configuration data corresponding to the card identifier in response to identifying the card identifier after the retimer card is coupled to the processor.Type: GrantFiled: August 13, 2019Date of Patent: September 28, 2021Assignee: Wistron CorporationInventors: Zh-Wei Zhang, Syu-Siang Lee
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Patent number: 11036665Abstract: An electronic system capable of detecting a number of hot-plug insertion/extraction cycles including a host device, at least one peripheral device, and at least one storage device is provided. The host device includes a controller and at least one connection socket. The controller has at least one detection pin. Each connection socket is coupled to a corresponding detection pin. The peripheral device includes at least one connector. The connector is hot-pluggably and electrically connected to the connection socket of the host device. The storage device stores the number of hot-plug insertion/extraction cycles of the connector in the peripheral device. When the connector of the peripheral device is connected to the connection socket of the host device, the controller reads the number of hot-plug insertion/extraction cycles from the storage device and increases the number of hot-plug insertion/extraction cycles of the connector in the peripheral device.Type: GrantFiled: October 3, 2018Date of Patent: June 15, 2021Assignee: Wistron CorporationInventors: Syu-Siang Lee, Yin-Hsin Chang
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Publication number: 20200379745Abstract: A firmware update device and a firmware update method are provided. The firmware update device includes a first storage medium, a baseboard management controller (BMC), a retimer card, and a processor. The first storage medium stores firmware configuration data. The BMC is coupled to the first storage medium, wherein the BMC is configured to update the firmware configuration data. The retimer card stores a card identifier and firmware. The processor is coupled to the first storage medium and the BMC, wherein the processor detects the card identifier of the retimer card and update the firmware of the retimer card according to the firmware configuration data corresponding to the card identifier in response to identifying the card identifier after the retimer card is coupled to the processor.Type: ApplicationFiled: August 13, 2019Publication date: December 3, 2020Applicant: Wistron CorporationInventors: Zh-Wei Zhang, Syu-Siang Lee
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Publication number: 20200336001Abstract: A power generating apparatus includes a power supply, a first sub-end circuit, a second sub-end circuit and an integrated signal generator. The first and second sub-end circuits respectively generate first and second sub-end standby power. The first sub-end circuit receives a first integrated control signal. The second sub-end circuit receives a second integrated control signal. The first sub-end circuit cuts off the first sub-end standby power according to the first integrated control signal and turns on the first sub-end standby power again after a first delay time. The second sub-end circuit cuts off the second sub-end standby power according to the second integrated control signal, and turns on the second sub-end standby power again after a second delay time. The integrated signal generator generates the first and second integrated control signals.Type: ApplicationFiled: July 19, 2019Publication date: October 22, 2020Applicant: Wistron CorporationInventors: Zh-Wei Zhang, Syu-Siang Lee
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Publication number: 20200333862Abstract: An extended system includes at least one peripheral component interconnect express (PCIE) connector and a control device. The PCIE connector is suitable for connecting to at least one server device. The control device is connected to PCIE connector. According to at least one working voltage generated by the server device, the control device turns on the extended system and ignores a power control signal generated by the extended system, or the control unit generates at least one wakeup signal according to the power control signal generated by the extended system and transmits the wakeup signal to the server device, so that the server device may turn on and generate a working voltage.Type: ApplicationFiled: July 19, 2019Publication date: October 22, 2020Inventors: Zh-Wei ZHANG, Syu-Siang LEE
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Patent number: 10782758Abstract: A framework for system power control of a dual-port non-volatile memory storage device is provided. The electronic system includes a storage device, two hosts and a control circuit within each of the two hosts. Each host filters signals for shortly turning off a power supply of the storage device during a process of boot and reboot of the host. When one of the hosts enters a turn-off state, it is detected whether another one of the hosts is running, and the one of the hosts does not control the power supply if the another one of the hosts is running. Two control signals of the two hosts control the power supply of the storage device through an AND gate.Type: GrantFiled: November 29, 2018Date of Patent: September 22, 2020Assignee: Wistron CorporationInventors: Syu-Siang Lee, Zh-Wei Zhang
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Patent number: 10678739Abstract: An electronic system, a host device and a control method are provided. The electronic system includes a host device, a cable and a slave device. The slave device receives supply power for operation. The cable is coupled between the host device and the slave device. The host device includes a data transmission interface circuit, a management circuit and a central processing unit. The data transmission interface circuit includes a reset circuit. The reset circuit is utilized for detecting whether the slave device has powered on and accordingly generating a simulated hot plug signal. The management circuit is utilized for determining a hot plug state between the host device and the slave device according to the simulated hot plug signal and accordingly generating a control signal. The central processing unit is utilized for establishing a link between the host device and the slave device according to the control signal.Type: GrantFiled: August 12, 2019Date of Patent: June 9, 2020Assignee: Wistron CorporationInventors: Syu-Siang Lee, Yin-Hsin Chang, Wen-Bin Lin
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Publication number: 20200089294Abstract: A framework for system power control of a dual-port non-volatile memory storage device is provided. The electronic system includes a storage device, two hosts and a control circuit within each of the two hosts. Each host filters signals for shortly turning off a power supply of the storage device during a process of boot and reboot of the host. When one of the hosts enters a turn-off state, it is detected whether another one of the hosts is running, and the one of the hosts does not control the power supply if the another one of the hosts is running. Two control signals of the two hosts control the power supply of the storage device through an AND gate.Type: ApplicationFiled: November 29, 2018Publication date: March 19, 2020Applicant: Wistron CorporationInventors: Syu-Siang Lee, Zh-Wei Zhang
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Publication number: 20190391948Abstract: An electronic system capable of detecting a number of hot-plug insertion/extraction cycles including a host device, at least one peripheral device, and at least one storage device is provided. The host device includes a controller and at least one connection socket. The controller has at least one detection pin. Each connection socket is coupled to a corresponding detection pin. The peripheral device includes at least one connector. The connector is hot-pluggably and electrically connected to the connection socket of the host device. The storage device stores the number of hot-plug insertion/extraction cycles of the connector in the peripheral device. When the connector of the peripheral device is connected to the connection socket of the host device, the controller reads the number of hot-plug insertion/extraction cycles from the storage device and increases the number of hot-plug insertion/extraction cycles of the connector in the peripheral device.Type: ApplicationFiled: October 3, 2018Publication date: December 26, 2019Applicant: Wistron CorporationInventors: Syu-Siang Lee, Yin-Hsin Chang
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Patent number: 10235313Abstract: A connecting circuitry is disclosed. The connecting circuitry is coupled to a storage device, a first motherboard and a second motherboard, and controlled by a first control signal and a second control signal to switch over to a first mode, to a second mode and to a third mode. The connecting circuitry includes a first exchanging unit; a second exchanging unit; and a first multiplexing unit, electrical connected to the first exchanging unit and the second exchanging unit; wherein the first mode is the storage device being only accessed by the first motherboard, the second mode is the storage device being only accessed by the second motherboard, and the third mode is the storage device being accessed by both the first motherboard and the second motherboard.Type: GrantFiled: November 23, 2015Date of Patent: March 19, 2019Assignee: Wistron CorporationInventors: Syu-Siang Lee, Ming-Chun Lee, Zh-Wei Zhang
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Publication number: 20170003709Abstract: A connecting circuitry is disclosed. The connecting circuitry is coupled to a storage device, a first motherboard and a second motherboard, and controlled by a first control signal and a second control signal to switch over to a first mode, to a second mode and to a third mode. The connecting circuitry includes a first exchanging unit; a second exchanging unit; and a first multiplexing unit, electrical connected to the first exchanging unit and the second exchanging unit; wherein the first mode is the storage device being only accessed by the first motherboard, the second mode is the storage device being only accessed by the second motherboard, and the third mode is the storage device being accessed by both the first motherboard and the second motherboard.Type: ApplicationFiled: November 23, 2015Publication date: January 5, 2017Inventors: Syu-Siang Lee, Ming-Chun Lee, Zh-Wei Zhang