Patents by Inventor Syu-Tang LIU
Syu-Tang LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12249583Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.Type: GrantFiled: August 15, 2023Date of Patent: March 11, 2025Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
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Publication number: 20240429213Abstract: An electronic device is provided. The electronic device includes a package structure and a power regulating element. The package structure includes an electronic component, a plurality of first conductive structures, and an encapsulant. The plurality of first conductive structures are connected to the electronic component. The encapsulant encapsulates the electronic component and exposes a portion of the plurality of first conductive structures. The power regulating component includes a plurality of second conductive structures directly bonded with the plurality of first conductive structures and configured to provide the electronic component with a power signal.Type: ApplicationFiled: June 20, 2023Publication date: December 26, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Pao-Nan LEE, Yu-Hsun CHANG, Jung Jui KANG
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Publication number: 20240421086Abstract: An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a circuit structure. The circuit structure is supported by the first electronic component and the second electronic component. The circuit structure electrically connects the first electronic component to the second electronic component and is configured to provide the first electronic component and the second electronic component with a power.Type: ApplicationFiled: June 16, 2023Publication date: December 19, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Pao-Nan LEE, Syu-Tang LIU, Yu-Hsun CHANG
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Patent number: 12040261Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.Type: GrantFiled: March 29, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Tsung-Tang Tsai, Huang-Hsien Chang, Ching-Ju Chen
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Patent number: 11894340Abstract: A package structure includes a wiring structure and a first electronic device. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The first electronic device is electrically connected to the wiring structure, and has a first surface, a second surface and at least one lateral side surface extending between the first surface and the second surface. The first electronic device includes a first active circuit region and a first protrusion portion. The first protrusion portion protrudes from the at least one lateral side surface of the first electronic device. A portion of the first active circuit region is disposed in the first protrusion portion.Type: GrantFiled: November 15, 2019Date of Patent: February 6, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
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Publication number: 20240021540Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.Type: ApplicationFiled: August 15, 2023Publication date: January 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
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Patent number: 11862585Abstract: A semiconductor package structure includes a first substrate, a second substrate, a pad layer and a conductive bonding layer. The first substrate has a first surface and a second surface opposite to the first surface. The second substrate has a first surface and a second surface opposite to the first surface. The second substrate is disposed side-by-side with the first substrate. The pad layer is disposed on the second surface of the first substrate and the second surface of the second substrate. The conductive bonding layer is disposed between the pad layer and the second surfaces of the first substrate and the second substrate.Type: GrantFiled: February 21, 2020Date of Patent: January 2, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Huang-Hsien Chang, Shu-Han Yang
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Patent number: 11728282Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.Type: GrantFiled: October 17, 2019Date of Patent: August 15, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
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Patent number: 11631734Abstract: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.Type: GrantFiled: November 23, 2020Date of Patent: April 18, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Huang-Hsien Chang, Tsung-Tang Tsai, Hung-Jung Tu
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Patent number: 11621229Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a substrate structure, a redistribution structure, an adhesive layer and at least one conductive pillar. The redistribution structure includes at least one dielectric layer. The at least one dielectric layer defines at least one through hole extending through the dielectric layer. The adhesive layer is disposed between the redistribution structure and the substrate structure and bonds the redistribution structure and the substrate structure together. The at least one conductive pillar extends through the redistribution structure and the adhesive layer and is electrically connected to the substrate structure. A portion of the at least one conductive pillar is disposed in the through hole of the at least one dielectric layer.Type: GrantFiled: October 15, 2020Date of Patent: April 4, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Huang-Hsien Chang
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Patent number: 11581123Abstract: An inductor unit includes a conductive structure, a first magnetic element and an insulating layer. The conductive structure has a bottom conductive layer, a top conductive layer, and a first side conductive layer extending from the bottom conductive layer to the top conductive layer. The first magnetic element is disposed on the bottom conductive layer of the conductive structure. The insulating layer is disposed on the bottom conductive layer of the conductive structure, wherein the insulating layer covers and surrounds the first magnetic element. The circuit structure including the inductor unit and the methods for manufacturing the same are also provided.Type: GrantFiled: July 23, 2020Date of Patent: February 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Huang-Hsien Chang, Yunghsun Chen
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Patent number: 11508634Abstract: A semiconductor package structure, an electronic device, and method for manufacturing the same are provided. The semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device.Type: GrantFiled: October 5, 2020Date of Patent: November 22, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Min Lung Huang
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Publication number: 20220223507Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.Type: ApplicationFiled: March 29, 2022Publication date: July 14, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Tsung-Tang TSAI, Huang-Hsien CHANG, Ching-Ju CHEN
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Publication number: 20220122919Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a substrate structure, a redistribution structure, an adhesive layer and at least one conductive pillar. The redistribution structure includes at least one dielectric layer. The at least one dielectric layer defines at least one through hole extending through the dielectric layer. The adhesive layer is disposed between the redistribution structure and the substrate structure and bonds the redistribution structure and the substrate structure together. The at least one conductive pillar extends through the redistribution structure and the adhesive layer and is electrically connected to the substrate structure. A portion of the at least one conductive pillar is disposed in the through hole of the at least one dielectric layer.Type: ApplicationFiled: October 15, 2020Publication date: April 21, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Huang-Hsien CHANG
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Publication number: 20220108932Abstract: A semiconductor package structure, an electronic device, and method for manufacturing the same are provided. The semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device.Type: ApplicationFiled: October 5, 2020Publication date: April 7, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Min Lung HUANG
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Patent number: 11289411Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.Type: GrantFiled: July 29, 2020Date of Patent: March 29, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Tsung-Tang Tsai, Huang-Hsien Chang, Ching-Ju Chen
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Patent number: 11257742Abstract: A wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are stacked on and contact one another. The conductive through via extends through the dam portions.Type: GrantFiled: July 2, 2020Date of Patent: February 22, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Tsung-Tang Tsai
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Publication number: 20220028596Abstract: An inductor unit includes a conductive structure, a first magnetic element and an insulating layer. The conductive structure has a bottom conductive layer, a top conductive layer, and a first side conductive layer extending from the bottom conductive layer to the top conductive layer. The first magnetic element is disposed on the bottom conductive layer of the conductive structure. The insulating layer is disposed on the bottom conductive layer of the conductive structure, wherein the insulating layer covers and surrounds the first magnetic element. The circuit structure including the inductor unit and the methods for manufacturing the same are also provided.Type: ApplicationFiled: July 23, 2020Publication date: January 27, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Huang-Hsien CHANG, Yunghsun CHEN
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Publication number: 20220005756Abstract: A wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are stacked on and contact one another. The conductive through via extends through the dam portions.Type: ApplicationFiled: July 2, 2020Publication date: January 6, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Syu-Tang LIU, Tsung-Tang TSAI
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Patent number: 11107881Abstract: The subject application relates to a semiconductor package device, which includes a first conductive layer; a semiconductor wall disposed on the first conductive layer; a first conductive wall disposed on the first conductive layer; and an insulation layer disposed on the first conductive layer and between the semiconductor wall and the first conductive wall.Type: GrantFiled: April 25, 2019Date of Patent: August 31, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Shao Hsuan Chuang, Huang-Hsien Chang, Min Lung Huang, Yu Cheng Chen, Syu-Tang Liu