Patents by Inventor Syuichi Kikuchi

Syuichi Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130307469
    Abstract: A contactless power supply system includes a power transmission coil, a power receiving coil, and a center tap that is provided at the power transmission coil. Specifically, the power transmission coil has a first coil and a second coil. The first coil is configured with a first conducting wire that circularly extends from the center tap by winding in a first direction from a first internal circumference side to a first external circumference side. The second coil is configured with a second conducting wire that circularly extends from the center tap by winding in a second direction, which is opposite to the first direction, from a second internal circumference side to a second external circumference side. A first number of windings of the first coil is approximately the same as a second number of windings of the second coil.
    Type: Application
    Filed: March 8, 2013
    Publication date: November 21, 2013
    Applicant: SUMIDA CORPORATION
    Inventors: Morihiro KURODA, Syuichi KIKUCHI
  • Patent number: 8062494
    Abstract: There is a micro-machining apparatus for removing the micro-machining dust generated at the time of machining while a workpiece M is machined within a liquid W using a probe tip. The apparatus includes a stage on which the workpiece is to be placed; a probe having the probe tip, a machining device having a moving means that moves the stage and the probe relative to each other to machine the workpiece by the probe tip, and a micro-machining dust removing device having a first electrode and a second electrode that are arranged in the liquid so as to sandwich the probe tip therebetween, and a voltage application means that applies a voltage to between both the electrodes to move the micro-machining dust in the liquid.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: November 22, 2011
    Assignees: National University Corporation Shizuoka University, SII Nano Technology Inc.
    Inventors: Futoshi Iwata, Masatoshi Yasutake, Takuya Nakaue, Syuichi Kikuchi, Osamu Takaoka
  • Publication number: 20080132151
    Abstract: There is a micro-machining apparatus for removing the micro-machining dust generated at the time of machining while a workpiece M is machined within a liquid W using a probe tip. The apparatus includes a stage on which the workpiece is to be placed; a probe having the probe tip, a machining device having a moving means that moves the stage and the probe relative to each other to machine the workpiece by the probe tip, and a micro-machining dust removing device having a first electrode and a second electrode that are arranged in the liquid so as to sandwich the probe tip therebetween, and a voltage application means that applies a voltage to between both the electrodes to move the micro-machining dust in the liquid.
    Type: Application
    Filed: June 4, 2007
    Publication date: June 5, 2008
    Applicants: NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITY, SII Nano Technology Inc.
    Inventors: Futoshi Iwata, Masatoshi Yasutake, Takuya Nakaue, Syuichi Kikuchi, Osamu Takaoka
  • Publication number: 20070296457
    Abstract: Disclosed is a programmable logic circuit control apparatus capable of managing data with various bit widths and data lengths, generated by various processes to be executed by a programmable logic circuit, with a simple structure. A module address memory section (4) stores data indicating addresses of modules or conditions for branching processes and jump distances page by page. A write address and a read address of an internal data memory (2) are also stored in a page where the address of a module is stored. A circuit control section (5) reads data of each page from the module address memory section (4), and, according to the read data, reads a module, reconfigures a programmable logic circuit and reads data of a next page, or performs jump. When the programmable logic circuit is to be reconfigured, the circuit control section (5) performs an operation of supplying a write address and a read address to the internal data memory (2).
    Type: Application
    Filed: February 21, 2005
    Publication date: December 27, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Syuichi Kikuchi
  • Publication number: 20070245069
    Abstract: A physical group address is allocated to a storage area of a flash memory (11) for each group as units smaller than a block as units of data erasing, and the group includes multiple pages and the page includes multiple columns. When writing data and a logical address of a writing destination are supplied, a CPU (121) writes the data in a column in the group indicated by a writing pointer to associate the supplied logical address with the column. A relationship between the physical group address of the group having this column and the logical group address is stored in a logical/physical conversion table of a RAM (123). Data stored in the block is erased when the number of blocks having no empty block reaches a predetermined number or less.
    Type: Application
    Filed: September 8, 2005
    Publication date: October 18, 2007
    Inventor: Syuichi Kikuchi
  • Publication number: 20060143365
    Abstract: Disclosed is a memory device which is not easily deteriorated and a memory managing method which does not easily deteriorate a memory device. A physical address is given to a memory area of a flash memory (11) page by page. When supplied with to-bewritten data and a logical address where the data is to be written, a CPU (121) writes this data in a page indicated by a write pointer. The correlation between the physical address and the logical address of the page is stored in a RAM (123) in the form of BPT (Block Pointer Table). At the time of reading, the CPU (121) that has been supplied with the logical address searches the BPT to specify a physical address associated with that logical address and reads data from that page which is given the specified physical address. Flash erasing of a block is executed when the number of empty blocks becomes equal to or smaller than a predetermined number.
    Type: Application
    Filed: June 17, 2003
    Publication date: June 29, 2006
    Applicant: Tokyo Electron Device Limited
    Inventor: Syuichi Kikuchi
  • Patent number: 6342973
    Abstract: A zoom lens comprising a first lens group having a positive refracting power and its position fixed, a second lens group having a negative refracting power and displacable mainly for magnification, a third lens group having a positive refracting power and its position fixed, and a fourth lens group having a positive refracting power and displacable mainly for correction of the focal position for magnification and focusing.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: January 29, 2002
    Assignee: Sony Corporation
    Inventors: Syuichi Kikuchi, Yuichi Nakano, Atsuo Minato, Shinichi Arita, Yusuke Nanjo
  • Patent number: 5448400
    Abstract: A zoom finder of a real image type has an objective lens having positive refracting power and an eyepiece having positive refracting power. The objective lens is constructed by first, second, third and fourth lens groups sequentially arranged from an object side. The first lens group has positive refracting power. The second lens group has negative refracting power. The third lens group has positive refracting power. The fourth lens group has positive refracting power. The zoom finder is constructed such that a real image is focused and formed by the objective lens between the fourth lens group and the eyepiece and is observed through the eyepiece. A magnification of the zoom finder is increased by moving the second lens group from the object side to an eyepiece side. A change in diopter caused by this increase in magnification is corrected by moving the fourth lens group. In accordance with the above structure, an entire length of the zoom finder is short and is not changed in a zooming operation.
    Type: Grant
    Filed: April 9, 1993
    Date of Patent: September 5, 1995
    Assignee: Ricoh Company, Ltd.
    Inventors: Syuichi Kikuchi, Takao Yamaguchi, Noriyuki Iwata, Masami Itoh
  • Patent number: 4843811
    Abstract: A bobbin transporting system includes a spinning bobbin transporting path and an empty bobbin transporting path both provided between a spinning frame and a winder, and a spinning bobbin reservoir path is formed intermittently of the spinning bobbin transporting path between the spinning frame and winder for temporarily reserving thereon all of spinning bobbins on a transport band which have been doffed by the spinning frame.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: July 4, 1989
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventors: Yoshio Yamamoto, Syuichi Kikuchi, Kazuo Nakanishi, Yoshihiko Kawasaki
  • Patent number: 4362011
    Abstract: False-twisting equipment including a first heater disposed on one side of an operation space, a second heater disposed on the other side of an operation space and a balloon control device and a false-twisting spindle disposed in the upper portion of the operation space wherein yarn is fed from the one side through the upper portion of the operation space and wound on the other side and the yarn passes through the upper portion of the operation space in a straight line so as to effectively propagete false-twists given to the yarn by the false-twisting spindle. The yarn, and the first heater are disposed as close to the floor as possible and the height of the top of the heater is lowered as much as possible, so that the yarn coming from the first heater to the false-twisting spindle is bent at a bending angle as large as possible.
    Type: Grant
    Filed: August 25, 1980
    Date of Patent: December 7, 1982
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventor: Syuichi Kikuchi