Patents by Inventor Syunzi Iinuma

Syunzi Iinuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5910850
    Abstract: Disclosed herein is a binarizing circuit comprising a setting circuit for responding to changes in density of inputted image data based on a unique algorithm and for setting an optimal binarizing density level, a delay circuit for delaying the inputted image data for a predetermined time period and for outputting delayed image data, and a comparator for comparing the delayed image data supplied from the delay circuit with the binarizing density level set by the setting circuit and for generating optimal binarized image data in accordance with the changes in density of the inputted image data. When an image of a low contrast is read from an original, character portions of a low contrast can be reproduced, with background noise being eliminated to achieve excellent binarizing.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: June 8, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Syunzi Iinuma