Patents by Inventor Syuudai Fukaya

Syuudai Fukaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20080268576
    Abstract: A semiconductor device improved in packaging reliability is disclosed. Each of leads used in the semiconductor device has a first surface positioned between a main surface of a resin sealing body and a back surface opposite to the main surface of the resin sealing body, a second surface positioned on the side opposite to the first surface and exposed from the back surface of the resin sealing body, a first end face positioned on a semiconductor chip side, a second end face positioned on the side opposite to the first end face and exposed from a side face of the resin sealing body, and a recessed portion depressed from the second surface to the first surface side and contiguous to the second end face, the second surface and an inner wall surface of the recessed portion being covered with a plating layer which is higher in solder wettability than the second end face of each of the leads.
    Type: Application
    Filed: July 9, 2008
    Publication date: October 30, 2008
    Inventors: Syuudai Fukaya, Toshiyuki Shinya, Hajime Hasebe
  • Method of manufacturing a semiconductor device
    Patent number: 7410834
    Abstract: A semiconductor device improved in packaging reliability is disclosed. Each of leads used in the semiconductor device has a first surface positioned between a main surface of a resin sealing body and a back surface opposite to the main surface of the resin sealing body, a second surface positioned on the side opposite to the first surface and exposed from the back surface of the resin sealing body, a first end face positioned on a semiconductor chip side, a second end face positioned on the side opposite to the first end face and exposed from a side face of the resin sealing body, and a recessed portion depressed from the second surface to the first surface side and contiguous to the second end face, the second surface and an inner wall surface of the recessed portion being covered with a plating layer which is higher in solder wettability than the second end face of each of the leads.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: August 12, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Syuudai Fukaya, Toshiyuki Shinya, Hajime Hasebe
  • Method of manufacturing a semiconductor device
    Publication number: 20050139982
    Abstract: A semiconductor device improved in packaging reliability is disclosed. Each of leads used in the semiconductor device has a first surface positioned between a main surface of a resin sealing body and a back surface opposite to the main surface of the resin sealing body, a second surface positioned on the side opposite to the first surface and exposed from the back surface of the resin sealing body, a first end face positioned on a semiconductor chip side, a second end face positioned on the side opposite to the first end face and exposed from a side face of the resin sealing body, and a recessed portion depressed from the second surface to the first surface side and contiguous to the second end face, the second surface and an inner wall surface of the recessed portion being covered with a plating layer which is higher in solder wettability than the second end face of each of the leads.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 30, 2005
    Inventors: Syuudai Fukaya, Toshiyuki Shinya, Hajime Hasebe