Patents by Inventor Syuuichi Shiratsuchi

Syuuichi Shiratsuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory IC and memory device capable of expansion of storage capacity
    Patent number: 5345412
    Abstract: A memory IC includes a memory element having a chip select signal input terminal and a decoder for decoding a portion of an address input signal to output, from the decoding, a chip select signal from one of a plurality of output terminals. One of the plurality of output terminals is connected to the chip select signal input terminal of said memory element for selecting the memory element for read and write operations. A memory device includes a plurality of memory ICs, each having a memory element, a decoder for decoding a portion of an address input signal to output, from the decoding, a chip select signal from one of a plurality of output terminals, and a plurality of leads connected to the memory element and the decoder. One of the plurality of output terminals is connected to the chip select signal input terminal of the memory element for selecting the memory element for read and write operations. The specific output terminals of the decoders of the respective memory ICs differ from each other.
    Type: Grant
    Filed: July 17, 1992
    Date of Patent: September 6, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Syuuichi Shiratsuchi