Abstract: A high order filter circuit is integrated by a plurality of the low order filter circuits. Before correcting the high order filter circuit, switch units may restore the high order filter circuit to the low order filter circuits for correction, and then combine the corrected low order filter circuits to form the original high order filter circuit.

Abstract: A high order filter circuit is integrated by a plurality of the low order filter circuits. Before correcting the high order filter circuit, switch units may restore the high order filter circuit to the low order filter circuits for correction, and then combine the corrected low order filter circuits to form the original high order filter circuit.

Abstract: A low order filter circuit having a frequency correction function, a frequency correction method for a low order filter circuit, and a high order filter circuit are provided. An analog to digital converter (ADC) may detect a peak of a signal processed by a second order filter unit, and after comparison and determination are performed by a digital correction unit, a frequency control signal is outputted as a feedback to a notch filter or a band-pass filter in the second order filter unit where frequency adjustment is performed. The high order filter circuit is integrated by a plurality of the low order filter circuits. Before correcting the high order filter circuit, switch units may restore the high order filter circuit to the low order filter circuits for correction, and then combine the corrected low order filter circuits to form the original high order filter circuit.

Abstract: A low order filter circuit having a frequency correction function, a frequency correction method for a low order filter circuit, and a high order filter circuit are provided. An analog to digital converter (ADC) may detect a peak of a signal processed by a second order filter unit, and after comparison and determination are performed by a digital correction unit, a frequency control signal is outputted as a feedback to a notch filter or a band-pass filter in the second order filter unit where frequency adjustment is performed. The high order filter circuit is integrated by a plurality of the low order filter circuits. Before correcting the high order filter circuit, switch units may restore the high order filter circuit to the low order filter circuits for correction, and then combine the corrected low order filter circuits to form the original high order filter circuit.

Abstract: A method for driving a liquid crystal display (200) includes: providing a liquid crystal display having a plurality of pixel units and a backlight; dividing a frame time into a plurality of sub-frames; defining each pixel unit to have two states, namely on or off, in each of the sub-frames; defining the backlight to have a gradation luminance and two states, namely on or off, in each of the sub-frames; and synchronously controlling the state of each pixel unit, a time period of the on state of each pixel unit, the gradation luminance of the backlight, and a time period of the on state of the backlight in each of the sub-frames to make a resulting total luminous flux in each pixel unit corresponding to a gray scale of an image to be displayed in the frame time to be the same as that of other pixel units.

Abstract: An exemplary shift register system (31) includes a counter (316), a shift register (311) and a plurality of switches (312, 313, 314, 315). The counter includes a signal receiving pin which is for connection to a first external circuit, a pulse output pin, and a number of signal output pins. The shift register includes sixty-four register units therein, sixty-four output pins, a start pin connected to the pulse output pin of the counter, a controlling pin connected to the signal receiving pin of the counter. Each switch includes sixty-four input pins connected to the output pins of the shift register through a bus line, sixty-four output pins that are for connection to a second external circuit, and an enabling pin connected to a respective one of the signal output pins of the counter. A related method for driving a shift register system, and a circuit for driving a liquid crystal display, are also provided.

Abstract: An exemplary shift register system (31) includes a shift register (311), and four switches (312-315). The shift register includes input pins, output pins, a start pin, a reset pin, a first controlling pin, and a second controlling pin. Each switch includes input pins according to the output pins of the shift register, output pins, an enabling pin, and a third controlling pin. The switches are connected with each other in series through respective of the enabling and controlling pins thereof. The enabling pin of the first switch is connected to the start pin of the shift register, and the third controlling pin of the last switch is connected to the reset pin of the shift register. The output pins of the shift register are connected to the input pins of each switch through a bus line (316), and the output pins of the switches are connected to an external circuit.

Abstract: A method for driving an active matrix liquid crystal display (LCD) (200) includes: dividing a frame time into a first period and a second period; defining a gradation voltage that makes the light transmission of a pixel unit accumulated in the first period correspond to image data of an external circuit; defining a black-inserting voltage which corresponds with a black image; applying the gradation voltage to pixel electrodes (203) of pixel units of the LCD when the gate lines (201) are scanned by a gate driver (210) of the LCD in the first period; applying the black-inserting voltage to the pixel electrodes of the pixel units when the gate lines are scanned by the gate driver in the second period; and turning off a backlight of the LCD in the second period.

Abstract: An active matrix LCD (200) includes: a plurality of scanning lines (23) that are parallel to each other and that each extend along a first direction; a plurality of signal lines (24) that are parallel to each other and that each extend along a second direction orthogonal to the first direction; a plurality of thin film transistors (TFTs) each provided in the vicinity of a respective point of intersection of the scanning lines and the signal lines; a plurality of scanning line driving circuits (21) for providing a plurality of scanning signal groups to the scanning lines, each scanning signal group including an image scanning signal and a black-inserting scanning signal; a plurality of signal line driving circuits (22) for providing gradation voltage data to the signal lines; and a plurality of black-inserting circuits (28) for providing a high voltage corresponding to black image data to the signal lines.

Abstract: A driving method for an active matrix liquid crystal display panel includes the following steps. First, a frame period is divided into a display period (t1) and a black insertion period (tr). A gray-scale voltage is generated according to a desired corresponding light transmittance of each pixel of the liquid crystal display panel; and during the display period, the gray-scale voltage is supplied to a corresponding pixel electrode of the liquid crystal display panel. Then during the black insertion period, a restoring voltage Vh is supplied to the pixel electrode, so that the pixel is returned to an initial black state. Accordingly, the quality of motion pictures of the liquid crystal display panel is good.

Abstract: An active matrix LCD (200) includes: a plurality of scanning lines (23) that are parallel to each other and that each extend along a first direction; a plurality of signal lines (24) that are parallel to each other and that each extend along a second direction orthogonal to the first direction; a plurality of thin film transistors (TFTs) each provided in the vicinity of a respective point of intersection of the scanning lines and the signal lines; a plurality of scanning line driving circuits (21) for providing a plurality of scanning signal groups to the scanning lines, each scanning signal group including an image scanning signal and a black-inserting scanning signal; a plurality of signal line driving circuits (22) for providing gradation voltage data to the signal lines; and a black-inserting circuit (28) for providing black-inserting signals corresponding to black image data to the signal lines.