Patents by Inventor Sze Kwang Tan
Sze Kwang Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10209844Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: GrantFiled: June 1, 2018Date of Patent: February 19, 2019Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Publication number: 20180275802Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: ApplicationFiled: June 1, 2018Publication date: September 27, 2018Applicant: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Patent number: 10013130Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: GrantFiled: December 13, 2017Date of Patent: July 3, 2018Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Publication number: 20180101266Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: ApplicationFiled: December 13, 2017Publication date: April 12, 2018Applicant: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Patent number: 9874986Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: GrantFiled: November 19, 2015Date of Patent: January 23, 2018Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Patent number: 9665215Abstract: Apparatus and methods to measure capacitance changes for a touch-sensitive capacitive matrix are described. Charge-removal circuits and measurement techniques may be employed to cancel deleterious effects of parasitic capacitances in the touch-sensitive capacitive matrix. Capacitively switching a supply during timed charge removal may be used to cancel unwanted effects due to clock jitter. The apparatus and methods can improve signal-to-noise characteristics, sensitivity, and/or dynamic range for capacitive measurements relating to touch-sensitive capacitive devices.Type: GrantFiled: March 29, 2013Date of Patent: May 30, 2017Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Sze-Kwang Tan, Yannick Guedon
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Patent number: 9389256Abstract: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.Type: GrantFiled: December 18, 2012Date of Patent: July 12, 2016Assignees: STMicroelectronics Asia Pacific Pte Ltd, STMicroelectronics S.r.l.Inventors: Paolo Angelini, Giovanni Carlo Tripoli, Ernesto Lasalandra, Tommaso Ungaretti, Kien Beng Tan, Yannick Guedon, Dianbo Guo, Sze-Kwang Tan
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Publication number: 20160077634Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: ApplicationFiled: November 19, 2015Publication date: March 17, 2016Applicant: STMicroelectronics Asia Pacific LtdInventors: Yannick Guedon, Sze-Kwang Tan, Dianbo Guo
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Patent number: 9223448Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: GrantFiled: September 28, 2012Date of Patent: December 29, 2015Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Sze-Kwang Tan, Yannick Guedon, Dianbo Guo
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Patent number: 9128573Abstract: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.Type: GrantFiled: September 14, 2012Date of Patent: September 8, 2015Assignees: STMicroelectronics S.r.l.;, STMicroelectronics Asia Pacific Pte LtdInventors: Paolo Angelini, Giovanni Carlo Tripoli, Ernesto Lasalandra, Tommaso Ungaretti, Kien Beng Tan, Yannick Guedon, Dianbo Guo, Sze-Kwang Tan
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Publication number: 20150145801Abstract: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.Type: ApplicationFiled: September 14, 2012Publication date: May 28, 2015Applicants: STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics S.r.I.Inventors: Paolo Angelini, Giovanni Carlo Tripoli, Ernesto Lasalandra, Tommaso Ungaretti, Kien Beng Tan, Yannick Guedon, Dianbo Guo, Sze-Kwang Tan
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Publication number: 20140292705Abstract: Apparatus and methods to measure capacitance changes for a touch-sensitive capacitive matrix are described. Charge-removal circuits and measurement techniques may be employed to cancel deleterious effects of parasitic capacitances in the touch-sensitive capacitive matrix. Capacitively switching a supply during timed charge removal may be used to cancel unwanted effects due to clock jitter. The apparatus and methods can improve signal-to-noise characteristics, sensitivity, and/or dynamic range for capacitive measurements relating to touch-sensitive capacitive devices.Type: ApplicationFiled: March 29, 2013Publication date: October 2, 2014Applicant: STMicroelectronics Asia Pacific Pte. Ltd.Inventors: Sze-Kwang Tan, Yannick Guedon
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Patent number: 8705217Abstract: An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.Type: GrantFiled: December 24, 2008Date of Patent: April 22, 2014Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Yannick Guedon, Meiliana Leow, Sze-Kwang Tan, Mariano Dissegna, Lorenzo Cerati
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Publication number: 20140092050Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: STMicroelectronics Asia Pacific Pte. Ltd.Inventors: Sze-Kwang Tan, Yannick Guedon, Dianbo Guo
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Publication number: 20140077823Abstract: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.Type: ApplicationFiled: December 18, 2012Publication date: March 20, 2014Applicants: STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics S.r.I.Inventors: Paolo Angelini, Giovanni Carlo Tripoli, Ernesto Lasalandra, Tommaso Ungaretti, Kien Beng Tan, Yannick Guedon, Dianbo Guo, Sze-Kwang Tan
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Patent number: 8030988Abstract: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.Type: GrantFiled: December 31, 2009Date of Patent: October 4, 2011Assignees: STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics (Grenoble 2) SASInventors: Swee Kiat Yap, Olivier Le-Briz, Sze-Kwang Tan
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Publication number: 20110156803Abstract: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.Type: ApplicationFiled: December 31, 2009Publication date: June 30, 2011Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD.Inventors: Swee Kiat Yap, Olivier Le-Briz, Sze-Kwang Tan
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Patent number: 7777432Abstract: A device and method for generation of a dynamic focus correction signal for use with a CRT that includes an analog scanning processor for generating a dynamic focus correction signal that is proportional to Kx2+(1?K)x4, where x is the distance from a mid point of a viewing surface of the CRT, and K is a real number in the range 0.00 to 1.00. Embodiments of the invention find particular use in CRTs having generally flatter, squarer configurations.Type: GrantFiled: September 30, 2002Date of Patent: August 17, 2010Assignee: STMicroelectronics Asia Pacific Pte. Ltd.Inventors: Eric Yves Serge Cirot, Sze Kwang Tan
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Publication number: 20100157493Abstract: An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.Type: ApplicationFiled: December 24, 2008Publication date: June 24, 2010Applicant: STMicroelectronics, Inc.Inventors: Yannick Guedon, Meiliana Leow, Sze-Kwang Tan, Mariano Dissegna, Lorenzo Cerati
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Patent number: 7161411Abstract: A circuit, method and system for generating a non-linear transfer characteristic, including a plurality of current mirror circuits in parallel, each current mirror circuit having an offset current applied to an output terminal of an output-side transistor of the current mirror circuit for controlling an output current thereof, wherein the offset current of each current mirror circuit is set to a respective predetermined level, and the transfer characteristic is generated by summing the respective output currents of the current mirror circuits in a piece-wise manner.Type: GrantFiled: February 20, 2001Date of Patent: January 9, 2007Assignee: STMicroelectronics Asia Pacific Pte Ltd.Inventors: Eric Yves Serge Cirot, Sze Kwang Tan, Mallikarjuna Rao Padala