Patents by Inventor Szu-Chieh Chen
Szu-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955245Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.Type: GrantFiled: July 2, 2021Date of Patent: April 9, 2024Assignees: Acer Incorporated, National Yang Ming Chiao Tung UniversityInventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
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Patent number: 9472580Abstract: A pixel array and a display panel are provided. The pixel array includes a plurality of pixel units. Each of the pixel units includes a first scan line, a second scan line, a data line, a first thin-film transistor, a second thin-film transistor, a first pixel electrode and a second pixel electrode. The first thin-film transistor is electrically connected to the first scan line and the data line. The first pixel electrode is electrically connected to the first thin-film transistor. The second thin-film transistor is electrically connected to the second scan line and the data line. The second pixel electrode is electrically connected to the second thin-film transistor. The orthogonal projection pattern of the first thin-film transistor on XY plane and the orthogonal projection pattern of the second thin-film transistor on XY plane are substantially the same.Type: GrantFiled: March 9, 2015Date of Patent: October 18, 2016Assignee: Au Optronics CorporationInventors: Szu-Chieh Chen, Yu-Hsin Ting, Chen-Ming Chen, I-Fang Chen, I-Hsuan Hung, Da-Wei Fan
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Publication number: 20150179671Abstract: A pixel array and a display panel are provided. The pixel array includes a plurality of pixel units. Each of the pixel units includes a first scan line, a second scan line, a data line, a first thin-film transistor, a second thin-film transistor, a first pixel electrode and a second pixel electrode. The first thin-film transistor is electrically connected to the first scan line and the data line. The first pixel electrode is electrically connected to the first thin-film transistor. The second thin-film transistor is electrically connected to the second scan line and the data line. The second pixel electrode is electrically connected to the second thin-film transistor. The orthogonal projection pattern of the first thin-film transistor on XY plane and the orthogonal projection pattern of the second thin-film transistor on XY plane are substantially the same.Type: ApplicationFiled: March 9, 2015Publication date: June 25, 2015Inventors: Szu-Chieh Chen, Yu-Hsin Ting, Chen-Ming Chen, I-Fang Chen, I-Hsuan Hung, Da-Wei Fan
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Patent number: 9007541Abstract: A pixel array and a display panel are provided. The pixel array includes a plurality of pixel units. Each of the pixel units includes a first scan line, a second scan line, a data line, a first thin-film transistor, a second thin-film transistor, a first pixel electrode and a second pixel electrode. The first thin-film transistor is electrically connected to the first scan line and the data line. The first pixel electrode is electrically connected to the first thin-film transistor. The second thin-film transistor is electrically connected to the second scan line and the data line. The second pixel electrode is electrically connected to the second thin-film transistor. The orthogonal projection pattern of the first thin-film transistor on XY plane and the orthogonal projection pattern of the second thin-film transistor on XY plane are substantially the same.Type: GrantFiled: September 14, 2012Date of Patent: April 14, 2015Assignee: Au Optronics CorporationInventors: Szu-Chieh Chen, Yu-Hsin Ting, Chen-Ming Chen, I-Fang Chen, Yi-Xuan Hung, Da-Wei Fan
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Patent number: 8988444Abstract: A system and method for configuring graphics register data and a recording medium are applied in a mobile device to store graphics operation data for displaying a picture. The system includes a plurality of register modules and an operation module. The operation module obtains unstored data from the graphics operation data, judges whether a register module already stored with data and having a configuration space sufficient for configuring the unstored data exists among all the plurality of register modules, so as to determine whether to store the unstored data into the register module already stored with data or a register module without storing-data, and when no register module without storing data exists and the configuration space of each register module already stored with data is insufficient for storing the unstored data, divides and stores the unstored data into a part of the plurality of register modules already stored with data.Type: GrantFiled: December 16, 2011Date of Patent: March 24, 2015Assignee: Institute for Information IndustryInventors: Szu-Chieh Chen, Yi-Ping You, Ming-Yung Ko
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Patent number: 8982031Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.Type: GrantFiled: September 12, 2012Date of Patent: March 17, 2015Assignee: AU Optronics Corp.Inventors: Yi-Xuan Hung, Yu-Hsin Ting, Chen-Ming Chen, Szu-Chieh Chen, Da-Wei Fan, Chung-Lin Fu
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Patent number: 8749475Abstract: A pixel array including a plurality of scan lines and a plurality of data lines disposed crossing the scan lines to define a plurality of sub-pixel regions; at least a controlling structure, disposed in one of the sub-pixel regions and electrically connected to one of the scan lines and data lines; a plurality of sensing signal lines disposed parallel with the data lines and crossing the scan lines to define a plurality of regions having at least one first sub-region and second sub-region; at least one sensing-signal readout device disposed in the first sub-region and electrically connected with one of the scan lines and sensing signal lines; and at least one first sensing pad disposed in the second sub-region and electrically connected to the sensing-signal readout device in the second sub-region. The numbers of the sensing-signal readout devices electrically connected to the respective scan lines are the same.Type: GrantFiled: October 18, 2010Date of Patent: June 10, 2014Assignee: Au Optronics CorporationInventors: Szu-Chieh Chen, Ming-Tien Lin, Pin-Wei Wu
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Publication number: 20130256706Abstract: A pixel array and a display panel are provided. The pixel array includes a plurality of pixel units. Each of the pixel units includes a first scan line, a second scan line, a data line, a first thin-film transistor, a second thin-film transistor, a first pixel electrode and a second pixel electrode. The first thin-film transistor is electrically connected to the first scan line and the data line. The first pixel electrode is electrically connected to the first thin-film transistor. The second thin-film transistor is electrically connected to the second scan line and the data line. The second pixel electrode is electrically connected to the second thin-film transistor. The orthogonal projection pattern of the first thin-film transistor on XY plane and the orthogonal projection pattern of the second thin-film transistor on XY plane are substantially the same.Type: ApplicationFiled: September 14, 2012Publication date: October 3, 2013Applicant: AU OPTRONICS CORPORATIONInventors: Szu-Chieh Chen, Yu-Hsin Ting, Chen-Ming Chen, I-Fang Chen, Yi-Xuan Hung, Da-Wei Fan
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Publication number: 20130155087Abstract: A system and method for configuring graphics register data and a recording medium are applied in a mobile device to store graphics operation data for displaying a picture. The system includes a plurality of register modules and an operation module. The operation module obtains unstored data from the graphics operation data, judges whether a register module already configured with data and having a configuration space sufficient for configuring the unstored data exists among all the register modules, so as to determine whether to store the unstored data into the register module already configured with data or a register module not configured with data, and when no register module not configured with data exists and the configuration space of each register module already configured with data is insufficient for storing the unstored data, divides and stores the unstored data into a part of the register modules already configured with data.Type: ApplicationFiled: December 16, 2011Publication date: June 20, 2013Inventors: Szu-Chieh CHEN, Yi-Ping You, Ming-Yung Ko
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Publication number: 20130155035Abstract: A method for driving a pixel circuit, which is adapted to drive a first pixel circuit coupled to a first gate line and a second pixel circuit coupled to a second gate line, is disclosed. The first pixel circuit receives display data before the second pixel circuit does. The method provides only one first enable pulse to the first gate line in a frame, and provides a second enable pulse and a third enable pulse to the second gate line in the same frame. The starting time of the second enable pulse is in an enabled time period of the first enable pulse, and the enabled time period of the third enable pulse is after the enabled time periods of the first and second enable pulses.Type: ApplicationFiled: September 11, 2012Publication date: June 20, 2013Applicant: AU OPTRONICS CORP.Inventors: Szu-Chieh CHEN, Yu-Hsin TING, Chung-Lung LI, Chen-Ming CHEN, I-Fang CHEN, Yun-Chung LIN, Da-Yei FAN, Yi-Xuan HUNG, Chun-Yu HUANG
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Publication number: 20130127801Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.Type: ApplicationFiled: September 12, 2012Publication date: May 23, 2013Applicant: AU OPTRONICS CORP.Inventors: Yi-Xuan Hung, Yu-Hsin Ting, Chen-Ming Chen, Szu-Chieh Chen, Da-Wei Fan, Chung-Lin Fu
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Publication number: 20110310032Abstract: A pixel array including a plurality of scan lines and a plurality of data lines disposed crossing the scan lines to define a plurality of sub-pixel regions; at least a controlling structure, disposed in one of the sub-pixel regions and electrically connected to one of the scan lines and data lines; a plurality of sensing signal lines disposed parallel with the data lines and crossing the scan lines to define a plurality of regions having at least one first sub-region and second sub-region; at least one sensing-signal readout device disposed in the first sub-region and electrically connected with one of the scan lines and sensing signal lines; and at least one first sensing pad disposed in the second sub-region and electrically connected to the sensing-signal readout device in the second sub-region. The numbers of the sensing-signal readout devices electrically connected to the respective scan lines are the same.Type: ApplicationFiled: October 18, 2010Publication date: December 22, 2011Applicant: AU OPTRONICS CORPORATIONInventors: Szu-Chieh Chen, Ming-Tien Lin, Pin-Wei Wu