Patents by Inventor Szu-Chin Tsao

Szu-Chin Tsao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240346217
    Abstract: An integrated circuit includes a core domain having at least one core domain design rule limitation of a smaller device and a lower operating voltage, an input/output domain having at least one input/output domain design rule limitation of a larger device than the smaller device of the core domain and a higher operating voltage than the lower operating voltage of the core domain, and a mapping cell that includes two or more electrical devices that each meet the at least one core domain design rule limitation. The mapping cell is configured to be an input/output device and operate in the input/output domain at the higher operating voltage of the input/output domain.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 17, 2024
    Inventors: Jaw-Juinn Horng, Szu-Chin Tsao