Patents by Inventor Szu Wang

Szu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070268753
    Abstract: Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a hole-tunneling barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays and methods of operation.
    Type: Application
    Filed: July 30, 2007
    Publication date: November 22, 2007
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hang-Ting Lue, Szu Wang
  • Publication number: 20070217176
    Abstract: A handheld communication apparatus includes a metallic insert molding member, a circuit board and a shielding frame. The metallic insert molding member includes a metal plate. An electronic component is mounted on the circuit board. The shielding frame defines opposite first and second openings, wherein the shielding frame is bonded to the metal plate of the metallic insert molding member at the first opening, thereby forming a shielding case. The electronic component on the circuit board is inserted into the second opening of the shielding frame to be shielded by the shielding case.
    Type: Application
    Filed: May 31, 2006
    Publication date: September 20, 2007
    Applicant: ARIMA COMMUNICATIONS CORPORATION
    Inventor: Szu Wang
  • Publication number: 20060202252
    Abstract: Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a small hole-tunneling-barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays thereof and methods of operation.
    Type: Application
    Filed: January 3, 2006
    Publication date: September 14, 2006
    Inventors: Szu Wang, Hang-Ting Lue