Abstract: A semiconductor device includes a first interconnect structure, a device layer, a second interconnect structure, a diamond layer, a passivation layer, and an electrical connector. The device layer is disposed over the first interconnect structure. The second interconnect structure is disposed over the device layer and comprises a topmost metallization pattern. The diamond layer is disposed over the second interconnect structure and at least revealing a part of the topmost metallization pattern. The passivation layer covers the diamond layer and reveals the part of the topmost metallization pattern. The electrical connector is disposed over the passivation layer and bonded to the part of the topmost metallization pattern.

Abstract: Optical devices and methods of manufacture are presented in which optical interposers are embedded within interposers. In some embodiments a method includes embedding an optical interposer into an interposer with one or more waveguides, with or without other semiconductor devices, and then bonding one or more semiconductor devices onto the interposer.

Abstract: An inspection apparatus for inspecting a semiconductor workpiece includes a testing stage, a first seal member, a testing clamp, a second seal member, a semiconductor workpiece, and a transducer. The testing stage has a cavity. The first seal member is disposed in the cavity. The first seal member is attached to a sidewall of the cavity. The testing clamp is movably coupled to the testing stage. The second seal member is attached to the testing clamp. The semiconductor workpiece is held between the testing stage and the testing clamp by the first seal member and the second seal member. The transducer is movably disposed above the testing stage.

Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.

Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.

Abstract: A package structure is provided. The package structure includes a first semiconductor die having a first connector and a first insulating layer surrounding the first connector. The package structure also includes a second semiconductor die bonded to the first semiconductor die. The second semiconductor die has a second connector and a second insulating layer surrounding the second connector. A first interface between the first insulating layer and the second insulating layer is level with a second interface between the first connector and the second connector.

Abstract: A semiconductor device includes a semiconductor die and a conductive structure disposed side-by-side and spaced apart from each other through an insulating encapsulant. The conductive structure includes a first conductor laterally covered by the insulating encapsulant, and a second conductor disposed over and separating from the first conductor. The second conductor includes a first portion laterally covered by the insulating encapsulant and a second portion protruded from the insulating encapsulant, where a ratio of a first standoff height of the first portion and a second standoff height of the second portion ranges from about 0.4 to about 1.5.

Abstract: In an embodiment, a device includes: a substrate having a first side and a second side opposite the first side; an interconnect structure adjacent the first side of the substrate; and an integrated circuit device attached to the interconnect structure; a through via extending from the first side of the substrate to the second side of the substrate, the through via being electrically connected to the integrated circuit device; an under bump metallurgy (UBM) adjacent the second side of the substrate and contacting the through via; a conductive bump on the UBM, the conductive bump and the UBM being a continuous conductive material, the conductive bump laterally offset from the through via; and an underfill surrounding the UBM and the conductive bump.

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

Abstract: An electro-optical device includes a waveguide and a first electrode and a second electrode. The first electrode and the second electrode at first and second sides of the waveguide, wherein the first electrode and the second electrode directly contact and extend beyond the first and second sides of the waveguide respectively.

Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.

Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

Abstract: A composite wafer may be provided by: forming a layer stack including a carrier layer, an ion implantation layer, and a transfer material layer by implanting ions into a donor wafer; forming intersecting trenches through the transfer material layer, the ion implantation layer, and an upper portion of the carrier layer; attaching the layer stack to an acceptor wafer including a stack of a handle substrate and a first dielectric oxide layer by bonding the layer stack to the first dielectric oxide layer; and cleaving the layer stack at the ion implantation layer, whereby a composite wafer including the acceptor wafer and patterned portions of the transfer material layer is formed.

Abstract: A package structure is provided. The package structure includes a lower semiconductor die and a first protective layer surrounding the lower semiconductor die. The package structure also includes a dielectric layer partially covering the first protective layer and the lower semiconductor die and an upper semiconductor die over the lower semiconductor die and the first protective layer. The upper semiconductor die is bonded with the lower semiconductor die through a connector. The package structure further includes an insulating film surrounding the connector and a second protective layer surrounding the upper semiconductor die. A portion of the second protective layer is between the insulating film and the dielectric layer.

Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The substrate is singulated to form dies. The first side of the dies are attached to a carrier. The dies are thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the dies. A device die is bonded to the second connectors. The dies and device dies are singulated into multiple packages. Corresponding structures result from these methods.

Abstract: Optical devices and methods of manufacture are presented in which a multi-tier connector is utilized to transmit and receive optical signals to and from an optical device. In embodiments a multi-tier connection unit receives optical signals from outside of an optical device, wherein the optical signals are originally in multiple levels. The multi-tier connection unit then routes the optical signals into a single level of optical components.

Abstract: A device structure includes: an interposer including metal wiring structures and optical waveguides that are embedded in interlayer dielectric layers, wherein the interposer includes a stepped outer sidewall including an outermost vertical surface segment, a laterally-recessed sidewall segment that is laterally recessed relative to the outermost vertical surface segment, and a connecting horizontal surface segment that connects the outermost vertical surface segment and the laterally-recessed vertical sidewall segment; and a fiber access unit having a first end that is optically coupled to a subset of the optical waveguides through at least one optical glue portion that is interposed between the fiber access unit and the laterally-recessed sidewall segment of the stepped outer sidewall.