Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.

Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope

Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.

Abstract: A computer system includes a local area network (LAN) and a plurality of computers. Each of the computers includes at least one central processing unit (CPU) and a LAN interface, which is coupled to communicate over the LAN, while the computers include no on-board input/output (I/O) device controllers other than the LAN interface. One or more peripheral devices are coupled to communicate with the computers over the LAN.

Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.

Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.

Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope

Abstract: In a system with hardware main memory compression, the method of this invention monitors the physical memory utilization and if physical memory is near exhaustion it forces memory to be paged out, thus freeing up real memory pages. These pages are then zeroed, thus they are highly compressible and therefore reduce the physical memory utilization. Pages that have been forced out due to high physical memory utilization are not made available for allocation. In systems where operating system changes are permitted, this invention dynamically controls the minimum size of the free page pool and zeros pages upon freeing. When the physical memory utilization falls below a critical threshold the mechanism reduces the minimum size of the free pool to allow further allocation. In systems where operating system changes are not possible, pages are allocated by a module (e.g. Device driver) and then zeroed.

Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope

Abstract: In a processing system having a main memory wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies and, wherein information stored within the main memory is indirectly accessible by a processor through a compression and decompression mechanisms, an improved memory architecture that accommodates the necessary compressed information data structures, together with a memory region and mapping method for storing information that bypasses the compression and decompression mechanisms to provide low latency processor access to certain address spaces.

Abstract: In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.

Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.

Abstract: In a computer system, a system and methodology for dynamically allocating available physical memory to addressable memory space on an as needed basis, and to recover unused physical memory space when it is no longer needed. Physical memory is assigned to addressable memory space when that memory space is first written. When the system software determines it has no further need of a memory space, the physical memory is recovered and made available for reuse.

Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope

Abstract: A nested frame communication protocol for communicating between computers. According to the nested frame communication protocol of the present invention, the computers communicate by transferring frames over communication links. The transmission of low priority frames may be interrupted in order to transmit high priority frames. After the transmission of the high priority frames is complete, the transmission of the low priority frames resumes. Processing states relating to interrupted frame transmissions are saved when the frame transmissions are interrupted. The processing states are restored when the interrupted frame transmissions are resumed.

Abstract: A system having a plurality of redundant channels operating in tight synchronism wherein input information received in one or more of said channels is distributed to all the other channels. The received information in each channel is retransmitted to suitable voter circuitry in each channel so as to provide one or more voted outputs in each channel based on the distributed and retransmitted information from all the channels. The voted outputs from all unfailed channels are substantially identical and the voted output from a failed channel will not be identical to that of the unfailed channels.

Abstract: A fault-tolerant clock system for providng digital timing signals (system clock signals) is provided by a plurality of clock sources. Each clock source receives as inputs the generated clock signals from all the other clock sources and contains receiver circuitry to derive a system clock signal from said clock sources which is the consensus clock signals of the other sources. Each clock source generates and distributes to the other clock sources a clock signal which is phase locked to the derived system clock from its clock receiver. In a system of (2r+2) clock sources (r+2) of them will remain phase locked to each other despite up to r clock source failures. Any clock receiver responsive to any (2r+1) of the clock sources can therefore derive a correct system clock despite up to r clock source failures.