Patents by Inventor T. Basil Smith, III

T. Basil Smith, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7844793
    Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Lorraine M. Herger, Mary McHugh, Dan E. Poff, Robert A. Saccone, Jr., Charles O. Schulz, T. Basil Smith, III
  • Patent number: 7380089
    Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: May 27, 2008
    Assignee: International Business Machines Corporation
    Inventors: Lorraine M. Herger, Mary McHugh, Dan E Poff, Robert A. Saccone, Jr., Charles O. Schulz, T. Basil Smith, III
  • Patent number: 6877081
    Abstract: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory, there is provided a system and method for managing real memory usage comprising: a compressed memory device driver for receiving real memory usage information from the compressed memory hardware controller, the information including a characterization of the real memory usage state: and, a compression management subsystem for monitoring the memory usage and initiating memory allocation and memory recovery in accordance with the memory usage state, the subsystem including mechanism for adjusting memory usage thresholds for controlling memory state changes.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: April 5, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lorraine M. Herger, Mary McHugh, Dan E Poff, Robert A. Saccone, Jr., Charles O. Schultz, T. Basil Smith, III
  • Patent number: 6665787
    Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Charles O. Schulz, T. Basil Smith, III, Robert B. Tremaine, Michael Wazlowski
  • Patent number: 6549995
    Abstract: In a processing system having a main memory wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies and, wherein information stored within the main memory is indirectly accessible by a processor through a compression and decompression mechanisms, an improved memory architecture that accommodates the necessary compressed information data structures, together with a memory region and mapping method for storing information that bypasses the compression and decompression mechanisms to provide low latency processor access to certain address spaces.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: April 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Charles O. Schulz, T. Basil Smith, III, Robert B. Tremaine, Michael Wazlowski
  • Patent number: 6519733
    Abstract: In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: February 11, 2003
    Assignee: International Business Machines Corporation
    Inventors: David Har, Kwok-Ken Mak, Charles O. Schulz, T. Basil Smith, III, R. Brett Tremaine
  • Patent number: 6401181
    Abstract: In a computer system, a system and methodology for dynamically allocating available physical memory to addressable memory space on an as needed basis, and to recover unused physical memory space when it is no longer needed. Physical memory is assigned to addressable memory space when that memory space is first written. When the system software determines it has no further need of a memory space, the physical memory is recovered and made available for reuse.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Michel Hack, Charles O. Schulz, T. Basil Smith, III, R. Brett Tremaine