Abstract: An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do not utilize a resistor.

Abstract: A circuit (200) can include a bias protection circuit (204) and a reference circuit (202). A bias protection circuit (204) can generate an internal power supply voltage (Vsuppi) from a higher device power supply (Vcch) with low voltage transistors and no resistors. A lower internal power supply voltage (Vsuppi) can be provided by buffer transistors (M5 and M6) that are biased according to limit section (206) that generates a bias voltage (biasn2) based on a threshold voltage drop and a feedback bias voltage (biasn1) from reference circuit (202).

Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.

Abstract: An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do not utilize a resistor.

Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.

Abstract: A circuit (200) can include a bias protection circuit (204) and a reference circuit (202). A bias protection circuit (204) can generate an internal power supply voltage (Vsuppi) from a higher device power supply (Vcch) with low voltage transistors and no resistors. A lower internal power supply voltage (Vsuppi) can be provided by buffer transistors (M5 and M6) that are biased according to limit section (206) that generates a bias voltage (biasn2) based on a threshold voltage drop and a feedback bias voltage (biasn1) from reference circuit (202).

Abstract: A low voltage detect and supply circuit (200) can include a detect circuit (202), a bias circuit (204) and a power supply transistor structure (P1). In operation, when a device power supply (Vext) remains above a predetermined limit, a detect circuit (202) can provide low impedance, thus maintaining transistor structure P1 in a high impedance state. When a device power supply (Vext) falls below a predetermined limit, a detect circuit can provide a high impedance. Embodiments of the circuit (200) do not include a differential voltage type comparator, and can be biased to draw relatively small amounts of current.