Patents by Inventor Ta-Cheng Liao

Ta-Cheng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136481
    Abstract: A micro light-emitting diode display device includes a substrate, a first planarization layer, a first light-emitting element, and a second planarization layer. The first planarization layer is disposed on the substrate and has a first opening. The first opening has a first opening inner wall. The first light-emitting element is disposed on the substrate, in the first opening, and separated from the first opening inner wall. The second planarization layer is disposed on the substrate and between the first planarization layer and the first light-emitting element. The second planarization layer is in contact with the first light-emitting element.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Bin-Cheng LIN, Chieh-Ming Chen, Bo-Ru Jian, Chi-Sheng Liao, Ta-Wen Liao
  • Patent number: 11852679
    Abstract: A circuit board for semiconductor test includes first and second sub-circuit boards, and an insulating dielectric layer therebetween. Each sub-circuit board includes a substrate and circuits including upper and lower contacts. The insulating dielectric layer includes through holes, and connecting conductors disposed therein and electrically connected with the upper and lower contacts of two sub-circuit boards. The circuit board is defined with central and peripheral regions. The lower contacts of the first sub-circuit board in the central region are electrically connected with a probe head. The upper contacts of the second sub-circuit board in the peripheral region are electrically connected with a tester, larger in pitch than the lower contacts of the first sub-circuit board in the central region, and larger in amount than the lower contacts of the first sub-circuit board in the peripheral region. The circuit board has great power test uniformity.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: December 26, 2023
    Assignee: MPI CORPORATION
    Inventors: Shih-Ching Chen, Jun-Liang Lai, Shung-Bo Lin, Ta-Cheng Liao, Yu-Chih Hsiao, Kun-Han Hsieh