Patents by Inventor Ta-chi Kuo

Ta-chi Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5898201
    Abstract: A metal oxide semiconductor field effect transistor power device with a lightly doped silicon substrate includes a source region and a drain region. At least one field implanted island region is formed along the surface of the substrate between the source and drain regions with a field oxide region formed above the field implanted region, a dielectric layer and a gate electrode formed over the substrate, and self-aligned source and drain regions implanted into the device with external electrodes connected thereto.
    Type: Grant
    Filed: July 28, 1997
    Date of Patent: April 27, 1999
    Assignee: United Microelectronics Corporation
    Inventors: Ching-Hsiang Hsu, Ta-Chi Kuo, Nai Jen Yeh, Su Lu
  • Patent number: 5700728
    Abstract: A new method of forming an integrated circuit MNOS/MONOS device with suppressed off-cell leakage current is described. A silicon oxide layer is formed on the surface of a semiconductor substrate. A layer of silicon nitride is deposited over the silicon oxide layer and patterned. A first ion implantation is performed at a tilt angle to form channel stop regions in the semiconductor substrate not covered by the patterned silicon nitride layer wherein the channel stop regions partially extend underneath the patterned silicon nitride layer. The silicon substrate not covered by the patterned silicon nitride layer is oxidized to form field oxide regions within the silicon substrate wherein the channel stop regions extend under the full length of the field oxide regions. The patterned silicon nitride layer is removed. An insulating layer of silicon nitride/silicon oxide (NO) or silicon oxide/silicon nitride/silicon oxide (ONO) is deposited over the surface of the semiconductor substrate.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: December 23, 1997
    Assignee: United Microelectronics Corporation
    Inventors: Ta-Chi Kuo, Jyh-Kuang Lin
  • Patent number: 5501997
    Abstract: A process for fabricating semiconductor devices having lightly-doped regions in its drain and/or source. The semiconductor device has a gate structure formed on its substrate, and the sidewalls of the gate structure covered by sidewall spacers. The sidewall spacers having a selected thickness obstructs the impurity implantation and constitutes a lightly-doped region in addition to the relatively heavily-doped regions that are not obstructed during the implantation process. Both the lightly- and heavily-doped regions together constitute the drain and/or source of the semiconductor device.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: March 26, 1996
    Assignee: United Microelectronics Corp.
    Inventors: Jyh-Kuang Lin, Ta-Chi Kuo
  • Patent number: 5500545
    Abstract: A field effect transistor has been developed with one source and one drain but with two independent active regions. It is shown how a double switching characteristic can be obtained with this structure which is described along with a process for its manufacture.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: March 19, 1996
    Assignee: United Microelectronics Corporation
    Inventors: Kuang-Chung Cheng, Meng-Jin Tsai, Ta-Chi Kuo, Kuo-Jaan Su
  • Patent number: 5482888
    Abstract: A metal oxide semiconductor field effect transistor power device with a lightly doped silicon substrate includes a source region and a drain region. At least one field implanted island region is formed along the surface of the oppositely substrate between the source and drain regions with a field oxide region formed above the field implanted region, a dielectric layer and a gate electrode of matching configurations formed over the substrate, and self-aligned source drain regions implanted into the device with external electrodes connected thereto.
    Type: Grant
    Filed: August 12, 1994
    Date of Patent: January 9, 1996
    Assignee: United Microelectronics Corporation
    Inventors: Ching-Hsiang Hsu, Ta-chi Kuo, Nai J. Yeh, Su Lu