Patents by Inventor Ta Hsiang Lin

Ta Hsiang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240225588
    Abstract: Provided is a method and apparatus of intelligent analysis for liver tumors, including an analysis module for receiving YOLOR-based training to acquire sufficient intelligence to detect and locate liver tumor automatically and attain a mAP score as high as 0.56 required to distinguish lesions of benignant and malignant liver tumors in medical images from each other, attaining a mAP score of 0.628 for tumors at least 5 cm in size or a mAP score of 0.33 for tumors less than 5 cm in size. Thus, the area under the liver tumor differentiation curve of the analysis module and the mAP score reach 0.9 and 0.56 respectively. The values equal those of the effect of the diagnosis rate of liver tumors with CT and MRI in practice. The method is advantageous in terms of higher speed and thus can diagnose liver tumors earlier, preclude delays and radiation, but incur low cost.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Inventors: Hsiao-Ching Nien, Ta-Hsiang Lin, Pei-Lien Chou
  • Patent number: 11546004
    Abstract: Aspects of the disclosure relate to an apparatus for wireless communication. The apparatus may include a set of power detectors configured to generate a set of analog signals related to a set of output signal power levels of a set of transmit chains of a transmitter, respectively; an analog summer; a set of switching devices configured to send a selected one or more of the set of analog signals to the analog summer, and substantially isolated unselected one or more of the set of power detectors from the analog summer, wherein the analog summer is configured to generate a cumulative analog signal based on a sum of the selected one or more of the set of analog signals; an analog-to-digital converter (ADC) configured to generate a digital signal based on the cumulative analog signal; and a controller configured to control the set of switching devices.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: January 3, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Meysam Azin, Li Lu, Anees Habib, Chinmaya Mishra, Damin Cao, Arul Balasubramaniyan, David Ta-hsiang Lin, Shuang Zhu, Dinesh Jagannath Alladi
  • Publication number: 20220311460
    Abstract: Aspects of the disclosure relate to an apparatus for wireless communication. The apparatus may include a set of power detectors configured to generate a set of analog signals related to a set of output signal power levels of a set of transmit chains of a transmitter, respectively; an analog summer; a set of switching devices configured to send a selected one or more of the set of analog signals to the analog summer, and substantially isolated unselected one or more of the set of power detectors from the analog summer, wherein the analog summer is configured to generate a cumulative analog signal based on a sum of the selected one or more of the set of analog signals; an analog-to-digital converter (ADC) configured to generate a digital signal based on the cumulative analog signal; and a controller configured to control the set of switching devices.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 29, 2022
    Inventors: Meysam AZIN, Li LU, Anees HABIB, Chinmaya MISHRA, Damin CAO, Arul BALASUBRAMANIYAN, David Ta-hsiang LIN, Shuang ZHU, Dinesh Jagannath ALLADI
  • Patent number: 11068228
    Abstract: An audio codec system includes an audio driver path coupled to a first node of the audio codec system. A first terminal of a sense resistor external to the audio codec system is coupled to the first node and a second terminal of the sense resistor is coupled to an auxiliary device load. The audio codec system includes a second path having a first bias circuit, a second bias circuit and an off-chip voltage reference. The first bias circuit is coupled to a second node of the audio codec system. The second bias circuit is coupled to a third node of the audio codec system. The off-chip voltage reference is associated with the auxiliary device load coupled between the first bias circuit and the second bias circuit.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: July 20, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Khaled Mahmoud Abdelfattah Aly, David Ta-hsiang Lin
  • Publication number: 20210153838
    Abstract: A method of Intelligent Analysis is provided for liver tumor. It is a method using scanning acoustic tomography (SAT) with a deep learning algorithm for determining the risk of malignance for liver tumor. The method uses the abundant experiences of abdominal ultrasound specialists as a base to mark pixel areas of liver tumors in ultrasound images. The parameters and coefficients of empirical data are trained with the deep learning algorithm to establish a categorizer model reaching an accuracy rate up to 86 percent. Thus, with an SAT image, a help to doctor or ultrasound technician is obtained to determine the risk of malignance for liver tumor through the method, and to further provide a reference base for diagnosing liver tumor category.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 27, 2021
    Inventors: Hsiao-Ching Nien, Ta-Hsiang Lin, Pei-Lien Chou
  • Publication number: 20200310740
    Abstract: An audio codec system includes an audio driver path coupled to a first node of the audio codec system. A first terminal of a sense resistor external to the audio codec system is coupled to the first node and a second terminal of the sense resistor is coupled to an auxiliary device load. The audio codec system includes a second path having a first bias circuit, a second bias circuit and an off-chip voltage reference. The first bias circuit is coupled to a second node of the audio codec system. The second bias circuit is coupled to a third node of the audio codec system. The off-chip voltage reference is associated with the auxiliary device load coupled between the first bias circuit and the second bias circuit.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Inventors: Khaled Mahmoud ABDELFATTAH ALY, David Ta-hsiang LIN
  • Patent number: 9356768
    Abstract: Certain aspects of the present invention provide methods and apparatus for detecting phase shift between signals, such as local oscillating signals in adjacent transceiver paths. One example circuit for phase detection generally includes a mixer configured to mix a first input signal having a first frequency with a second input signal having a second frequency to produce an output signal having frequency components at the sum of and the difference between the first and second frequencies; a filter connected with the mixer and configured to remove one of the frequency components at the sum of the first and second frequencies, thereby leaving a DC component; and an analog-to-digital converter (ADC) (e.g., a comparator) connected with the filter and configured to determine whether the first input signal is in-phase or out-of-phase with the second input signal based on a comparison between the DC component and a reference signal.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: May 31, 2016
    Assignee: Qualcomm Incorporated
    Inventors: David Ta-Hsiang Lin, Yongwang Ding, Young Gon Kim, Thinh Cat Nguyen, Jeongsik Yang, Sang-Oh Lee
  • Patent number: 9356769
    Abstract: Certain aspects of the present invention provide methods and apparatus for synchronizing frequency-divided oscillating signals associated with multiple radio frequency (RF) paths to be in-phase. For certain aspects, a reset pulse is input to synchronization logic for a particular RF path, and this logic retimes the reset pulse to a local synthesizer clock in this RF path. The retimed reset pulse drives the reset input of a local frequency divider for this RF path and is also appropriately delayed, buffered, and then daisy-chained to the synchronization logic in the next RF path to be repeated therein. By appropriately resetting the local frequency dividers using the synchronization logic in this manner, the frequency-divided oscillating signals for the RF paths are synchronized to operate in-phase with one another.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: May 31, 2016
    Assignee: Qualcomm Incorporated
    Inventor: David Ta-Hsiang Lin
  • Publication number: 20160087784
    Abstract: Certain aspects of the present invention provide methods and apparatus for synchronizing frequency-divided oscillating signals associated with multiple radio frequency (RF) paths to be in-phase. For certain aspects, a reset pulse is input to synchronization logic for a particular RF path, and this logic retimes the reset pulse to a local synthesizer clock in this RF path. The retimed reset pulse drives the reset input of a local frequency divider for this RF path and is also appropriately delayed, buffered, and then daisy-chained to the synchronization logic in the next RF path to be repeated therein. By appropriately resetting the local frequency dividers using the synchronization logic in this manner, the frequency-divided oscillating signals for the RF paths are synchronized to operate in-phase with one another.
    Type: Application
    Filed: February 5, 2015
    Publication date: March 24, 2016
    Inventor: David Ta-Hsiang LIN
  • Publication number: 20160087783
    Abstract: Certain aspects of the present invention provide methods and apparatus for detecting phase shift between signals, such as local oscillating signals in adjacent transceiver paths. One example circuit for phase detection generally includes a mixer configured to mix a first input signal having a first frequency with a second input signal having a second frequency to produce an output signal having frequency components at the sum of and the difference between the first and second frequencies; a filter connected with the mixer and configured to remove one of the frequency components at the sum of the first and second frequencies, thereby leaving a DC component; and an analog-to-digital converter (ADC) (e.g., a comparator) connected with the filter and configured to determine whether the first input signal is in-phase or out-of-phase with the second input signal based on a comparison between the DC component and a reference signal.
    Type: Application
    Filed: September 24, 2014
    Publication date: March 24, 2016
    Inventors: David Ta-Hsiang LIN, Yongwang DING, Young Gon KIM, Thinh Cat NGUYEN, Jeongsik YANG, Sang-Oh LEE
  • Publication number: 20040010939
    Abstract: A ventilation device is provided in a shoe. The device includes a porous member fitted in a receiving means in a rear of the insole, an intake pipe interconnected between a first check valve and the porous member, and a discharge pipe interconnected between a second check valve and porous member. Foul air is driven from porous member to the outside through the intake pipe and second check valve when the porous member is compressed by a foot. Conversely, fresh air is drawn into the porous member from the outside through the first check valve and intake pipe when the porous member is returned from the compressed state to an original state as the foot stops exerting force thereon.
    Type: Application
    Filed: June 11, 2003
    Publication date: January 22, 2004
    Inventors: Chang Yuen Liu, Ta Hsiang Lin, Hsien Yu Lin, Pei Chieh Liu