Abstract: A polishing pad conditioner is provided. The polishing pad includes a substrate, at least one surface-conditioning unit, and at least one groove-cleaning unit. The surface-conditioning unit and the groove-cleaning unit are both disposed on a surface of the substrate. In addition, the surface-conditioning unit is integrally formed with the groove-cleaning unit form.

Abstract: A method of evaluating the uniformity of the thickness of the polysilicon gate layer is provided. A substrate having a dense trenches area and a sparse trenches area is provided. A plurality of first trench isolation structures are formed in the sparse trenches area of the substrate and a plurality of second trench isolation structures are simultaneously formed in the dense trenches area of the substrate. A mask layer is formed between the gaps of the first and the second trench isolation structures. A portion of the first trench isolation structures of the sparse trenches area is then removed. Then, the mask layer is removed until the surface of the substrate is exposed. A polysilicon gate layer is formed over the substrate. Finally, a planarization process is performed to remove a portion of the polysilicon gate layer.

Abstract: A method of evaluating the uniformity of the thickness of the polysilicon gate layer is provided. A substrate having a dense trenches area and a sparse trenches area is provided. A plurality of first trench isolation structures are formed in the sparse trenches area of the substrate and a plurality of second trench isolation structures are simultaneously formed in the dense trenches area of the substrate. A mask layer is formed between the gaps of the first and the second trench isolation structures. A portion of the first trench isolation structures of the sparse trenches area is then removed. Then, the mask layer is removed until the surface of the substrate is exposed. A polysilicon gate layer is formed over the substrate. Finally, a planarization process is performed to remove a portion of the polysilicon gate layer.

Abstract: A dummy process and a polishing-pad conditioning process suitable for a chemical mechanical polishing (CMP) is provided. The CMP apparatus includes a polishing head, a polishing table, and a polishing pad. The polishing head includes a protective hood, a base, a retaining ring and a wafer supporting assembly. The wafer is attached to an attaching surface in the wafer receiving recess. Next, the wafer supporting assembly is moved to make the bottom surface of the retaining ring more protrusive than the bottom surface of the wafer such that the wafer does not contact the surface of the polishing pad. Accordingly, the need for a large number of dummy wafers can be effectively avoided.