Patents by Inventor Ta-Pen R. Guo

Ta-Pen R. Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4910417
    Abstract: A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open programmable elements situated at the intersection of any two segments to be connected. Sensing circuitry and wiring may be included to allow 100% observability of internal circuit nodes, such as module outputs, from an external pad interface. A universal function module may be configured to implement the popular logic functions and has a physical layout which is conductive to custom circuit design.
    Type: Grant
    Filed: January 5, 1989
    Date of Patent: March 20, 1990
    Assignee: Actel Corporation
    Inventors: Abbas El Gamal, Khaled A. El-Ayat, Jonathan W. Greene, Ta-Pen R. Guo, Justin M. Reyneri
  • Patent number: 4873459
    Abstract: A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segements connected by normally open programmable elements situated at the intersection of any two segments to be connected. Sensing circuitry and wiring may be included to allow 100% observability of internal circuit nodes, such as module outputs, from an external pad interface. A universal function module may be configured to implement the popular logic functions and has a physical layout which is conducive to custom circuit design.
    Type: Grant
    Filed: May 18, 1988
    Date of Patent: October 10, 1989
    Assignee: Actel Corporation
    Inventors: Abbas A. El Gamal, Khaled A. El-Ayat, Jonathan W. Greene, Ta-Pen R. Guo, Justin M. Reyneri