Patents by Inventor Ta-te Chen
Ta-te Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7358168Abstract: A shallow junction that previously would require the use of a low-energy ion implanter can be directly formed by high-energy or middle-energy ion implanters such that the manufacturer need not purchase a new low-energy ion implanter. In one embodiment, an ion-implantation method for forming a shallow junction comprises providing a semiconductor substrate including at least one transistor structure. During ion implantation to form a shallow junction, a buffer layer is formed on the implantation region. The buffer layer has a predetermined thickness. Charged ions are implanted into the implantation region through the buffer layer by an energy provided by a middle-energy ion implanter, and the buffer layer is removed. The buffer layer is used for blocking the amount of the charged ions that will be implanted into the implantation region so as to form a shallow junction that would require a low-energy ion implanter without the buffer layer.Type: GrantFiled: August 17, 2004Date of Patent: April 15, 2008Assignee: Mosel Vitelic, Inc.Inventors: Chun Te Lin, Ta-Te Chen, Jen-Li Lo
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Patent number: 7344998Abstract: In order to use an etching solution of less complicated composition for recovering used wafers, embodiments of the present invention provide a recovering method, and also provide a kind of wafer, which is used as a process control wafer or dummy wafer, and fabrication methods. In one embodiment, a wafer-recovering method comprises providing a first wafer, wherein the first wafer has a base, a first conductive layer on the base, and a second conductive layer on the first conductive layer. The method further comprises removing the first and second conductive layers with an acidic solution to obtain a second wafer; and washing the second wafer with a liquid. The second conductive layer is formed on the first conductive layer in a deposition process, and the first conductive layer is more easily removed by the acidic solution than the second conductive layer.Type: GrantFiled: September 15, 2004Date of Patent: March 18, 2008Assignee: Mosel Vitelic, Inc.Inventors: Chun-Te Lin, Ta-Te Chen
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Patent number: 7192789Abstract: A method for monitoring an ion implanter is disclosed. In one embodiment, the method comprises providing a wafer, forming a barrier layer on the surface of the wafer wherein the barrier layer has a substantial blocking effect on ion implantation, performing an ion implantation process to the wafer, performing a thermal treatment process, removing the barrier layer, and measuring a physical property of the wafer. The measured physical property of the wafer can be used to ascertain the status of the ion implanter. For instance, the measured physical property can be used to determine whether the ion implanter has problems when the energy or concentration of the implanted ions is changed.Type: GrantFiled: September 15, 2004Date of Patent: March 20, 2007Assignee: Mosel Vitelic, Inc.Inventors: Chun Te Lin, Chih Sheng Yang, Hong Zhi Lee, Ta-Te Chen
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Publication number: 20050258138Abstract: In order to use an etching solution of less complicated composition for recovering used wafers, embodiments of the present invention provide a recovering method, and also provide a kind of wafer, which is used as a process control wafer or dummy wafer, and fabrication methods. In one embodiment, a wafer-recovering method comprises providing a first wafer, wherein the first wafer has a base, a first conductive layer on the base, and a second conductive layer on the first conductive layer. The method further comprises removing the first and second conductive layers with an acidic solution to obtain a second wafer; and washing the second wafer with a liquid. The second conductive layer is formed on the first conductive layer in a deposition process, and the first conductive layer is more easily removed by the acidic solution than the second conductive layer.Type: ApplicationFiled: September 15, 2004Publication date: November 24, 2005Applicant: Mosel Vitelic, Inc.Inventors: Chun-Te Lin, Ta-Te Chen
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Publication number: 20050255660Abstract: A shallow junction that previously would require the use of a low-energy ion implanter can be directly formed by high-energy or middle-energy ion implanters such that the manufacturer need not purchase a new low-energy ion implanter. In one embodiment, an ion-implantation method for forming a shallow junction comprises providing a semiconductor substrate including at least one transistor structure. During ion implantation to form a shallow junction, a buffer layer is formed on the implantation region. The buffer layer has a predetermined thickness. Charged ions are implanted into the implantation region through the buffer layer by an energy provided by a middle-energy ion implanter, and the buffer layer is removed. The buffer layer is used for blocking the amount of the charged ions that will be implanted into the implantation region so as to form a shallow junction that would require a low-energy ion implanter without the buffer layer.Type: ApplicationFiled: August 17, 2004Publication date: November 17, 2005Applicant: Mosel Vitelic, Inc.Inventors: Chun Te Lin, Ta-Te Chen, Jen-Li Lo
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Publication number: 20050142672Abstract: A method for monitoring an ion implanter is disclosed. In one embodiment, the method comprises providing a wafer, forming a barrier layer on the surface of the wafer wherein the barrier layer has a substantial blocking effect on ion implantation, performing an ion implantation process to the wafer, performing a thermal treatment process, removing the barrier layer, and measuring a physical property of the wafer. The measured physical property of the wafer can be used to ascertain the status of the ion implanter. For instance, the measured physical property can be used to determine whether the ion implanter has problems when the energy or concentration of the implanted ions is changed.Type: ApplicationFiled: September 15, 2004Publication date: June 30, 2005Applicant: Mosel Vitelic, Inc.Inventors: Chun Te Lin, Chih Sheng Yang, Hong Zhi Lee, Ta-Te Chen
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Patent number: 6465369Abstract: A method for stabilizing a degas temperature of wafers in a degas chamber comprises (a) setting an electrical heater at an initial output power, (b) heating each wafer for a first period of time to keep the temperature of the wafer at a predetermined range by setting the electrical heater at a first output power equal to or higher than the initial output power, (c) heating the wafer for a second period of time to increase the temperature of the wafer to a predetermined value by raising the output power of the electrical heater to a second output power; and (d) heating the wafer for a third period of time by reducing the output power of the electrical heater to a third output power. The method lessens the “first wafer effect” and the “temperature-accumulated effect”. Therefore, the temperature of the wafers can be well controlled before a subsequent sputtering process.Type: GrantFiled: January 21, 2000Date of Patent: October 15, 2002Assignee: Mosel Vitelic Inc.Inventors: Tun-ho Teng, Ta-te Chen, Chih-hung Shu, Chan-bin Ho