Abstract: A method for manufacturing an insulated gate bipolar transistor includes (a) providing a substrate comprising a front side and a back side; (b) forming at least one front side element and at least one front side metal layer on the front side of the substrate; (c) performing a thinning process on the back side of the substrate; (d) performing a laser pre-treatment process on the back side of the substrate; (e) performing at least one ion doping process on the back side of the substrate for forming at least one ion doping layer; (f) performing an annealing process on the back side of the substrate; and (g) forming a collector metal layer on the back side of the substrate.

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.

Abstract: A wearable display device is disclosed and includes a main body, a heat dissipation processing module and an inflatable actuation module. The main body includes a front cover, a lateral cover, an inflatable airbag, a circuit board and a microprocessor. The heat dissipation processing module is configured to perform heat exchange with the microprocessor, and includes a first actuator, a heat pipe and a cooling chip. The inflatable actuation module includes a base, a ventilation channel, a second actuator and a valve component. When the second actuator and the valve component are driven, the valve component is opened and the second actuator is enabled, the gas is transported and inflates the inflatable airbag through the ventilation channel, so that the main body is stably fitted and positioned on the head of the wearer.

Abstract: A high electron mobility transistor (HEMT) device including a substrate, a channel layer, a barrier layer, a p-type gallium nitride (GaN) spacer, a gate electrode, a source electrode, and a drain electrode is provided. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer and has a protruding portion. The P-type GaN spacer is disposed on a side wall of the protruding portion. The gate electrode is disposed on the protruding portion and the P-type GaN spacer. The source electrode and the drain electrode are disposed on two sides of the gate electrode.

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

Abstract: A semiconductor package structure includes a first component, a bonding structure on the first component, a second component connected to the first component, and a copper connector on the second component. The bonding structure includes a copper base on the first component and copper protruding portions on the copper base. The second component is connected to the first component by bonding the copper protruding portions to the copper connector, and the copper protruding portions are in contact with the copper connector.

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.

Abstract: Systems and methods for enhanced mobile device authentication are disclosed. Systems and methods for enhanced mobile authentication are disclosed. In one embodiment, method for electronic device authentication may include (1) a server comprising at least one computer processor communicating a one-time passcode to an electronic device over a first communication channel; (2) the server receiving, from the electronic device over a second communication channel the one-time passcode encrypted with a private key associated with the electronic device; (3) the server decrypting the one-time passcode using a public key; (4) the server validating the one-time passcode; (5) the server generating a device identifier for the electronic device; and (6) the server persisting an association between the device identifier and the electronic device.

Abstract: Implementations generally relate to an image-based login and authentication system. In some implementations, a method includes displaying a plurality of random images to a user and receiving from the user a selection of at least one target image from the plurality of random images. The method further includes generating a hash number for the at least one target image, where the hash number identifies the at least one target image, and concealing the hash number in the at least one target image, where the concealing of the hash number provides security in an authentication of the at least one target image. The method further includes generating an encrypted identification token, where the encrypted identification token includes the hash number. The method further includes associating the encrypted identification token with the user, and storing the encrypted identification token in a database for authentication of at least one target image and the user.

Abstract: Systems and methods for enhanced mobile device authentication are disclosed. Systems and methods for enhanced mobile authentication are disclosed. In one embodiment, method for electronic device authentication may include (1) a server comprising at least one computer processor communicating a one-time passcode to an electronic device over a first communication channel; (2) the server receiving, from the electronic device over a second communication channel the one-time passcode encrypted with a private key associated with the electronic device; (3) the server decrypting the one-time passcode using a public key; (4) the server validating the one-time passcode; (5) the server generating a device identifier for the electronic device; and (6) the server persisting an association between the device identifier and the electronic device.

Abstract: A swing arm lock mechanism for securing a printed circuit board to a bracket includes a main body, a hooked arm, and an aperture in the main body. The hooked arm extends from and is integral with the main body. The hooked arm and main body define an open-ended slot for engaging a lock pin disposed on the bracket. The aperture receives a fastener for securing the main body to the printed circuit board such that the main body and hooked arm can rotate about a central axis of the fastener from a first unlocked position to a second locked position.

Abstract: A graphics processing unit (GPU) server having a GPU host head with one or more host graphics processing units (GPUs). The GPU server further has a GPU system with a plurality of system GPUs that are separate from the host GPUs, and that are configured to rapidly accelerate creation of images for output to a display device. The GPU server also has a mounting assembly that integrates the GPU host head and the GPU system into a single GPU server unit. The GPU host head is independently movable relative to the GPU system.

Abstract: A system for and a method of regulating the data interconnections between applications running on an infrastructure are provided. The system/method records access permission data into metadata embedded in the source code of each such application that regulates the data that can be received or transmitted by that application. In addition to regulating the receipt or transmission of data, the metadata can serve to provide instruction to firewalls and other regulating systems in order to configure those systems to allow the applications to receive and transmit data for which permissions have been recorded.

Abstract: A graphics processing unit (GPU) server having a GPU host head with one or more host graphics processing units (GPUs). The GPU server further has a GPU system with a plurality of system GPUs that are separate from the host GPUs, and that are configured to rapidly accelerate creation of images for output to a display device. The GPU server also has a mounting assembly that integrates the GPU host head and the GPU system into a single GPU server unit. The GPU host head is independently movable relative to the GPU system.

Abstract: A system chassis includes a bottom panel, a first sidewall, and a second sidewall. The bottom panel defines a width of the system chassis. The first sidewall extends substantially vertically from a first end of the bottom panel. The first sidewall includes a first channel vertically offset from the bottom panel. The first channel is configured to mate with a first rail of an equipment rack. The second sidewall extends substantially vertically from a second end of the bottom panel, and is opposite to the first sidewall. The second sidewall includes a second channel configured to mate with an opposing rail of the equipment rack.

Abstract: A graphics processing unit (GPU) server having a GPU host head with one or more host graphics processing units (GPUs). The GPU server further has a GPU system with a plurality of system GPUs that are separate from the host GPUs, and that are configured to rapidly accelerate creation of images for output to a display device. The GPU server also has a mounting assembly that integrates the GPU host head and the GPU system into a single GPU server unit. The GPU host head is independently movable relative to the GPU system.

Abstract: A docking system for facilitating a connection of an electronics module to a mating connector comprises first and second rails. Each rail has an elongated guide slot for receiving a corresponding guide portion of the electronics module during sliding movement of the electronics module toward the mating connector. A first elastic structure is located on the first rail. The first elastic structure has a first engagement portion extending into the elongated guide slot of the first rail. A second elastic structure is located on the second rail. The second elastic structure has a second engagement portion extending into the elongated guide slot of the second rail. The first engagement portion and the second engagement portion are configured to engage the guide portions of the electronics module and to resist movement of the guide portions in a direction generally perpendicular to the sliding movement of the electronics module.

Abstract: A system chassis includes a bottom panel, a first sidewall, and a second sidewall. The bottom panel defines a width of the system chassis. The first sidewall extends substantially vertically from a first end of the bottom panel. The first sidewall includes a first channel vertically offset from the bottom panel. The first channel is configured to mate with a first rail of an equipment rack. The second sidewall extends substantially vertically from a second end of the bottom panel, and is opposite to the first sidewall. The second sidewall includes a second channel configured to mate with an opposing rail of the equipment rack.

Abstract: A flap for a cage for holding electronic devices in a computing system is disclosed. The flap includes a main segment, a first vertical extension, a second vertical extension, a lateral ledge, and a tapered ledge. The first vertical extension and the second vertical extension extend from a first side of the main segment. The lateral ledge extends from a third side of the main segment. The tapered extensions extend from a second side of the main segment and include a flat section and an angled section. The flap has a deployed position and a stored position in the cage. The flap engages with at least two sides of the cage in the deployed or the stored position. The flap may be in the stored position when an electronic component is present. The flap blocks airflow through the cage in the deployed position.