Patents by Inventor Tachio Yuasa

Tachio Yuasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8441312
    Abstract: A reference current generating circuit has: first and second current mirror circuits and first and second output terminals. The first current mirror circuit has: a first transistor of a first polarity being an input-side transistor; and a first resistor connected between a gate of the first transistor and a power supply terminal. The second current mirror circuit has a second transistor of a second polarity being an input-side transistor. An output node of the first current mirror circuit is connected to an input node of the second current mirror circuit, and an input node of the first current mirror circuit is connected to an output node of the second current mirror circuit. A control voltage applied to the gate of the first transistor is output from the first output terminal. A control voltage applied to a gate of the second transistor is output from the second output terminal.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: May 14, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Patent number: 8242843
    Abstract: A push-pull amplifier including first to third current paths. The first current path includes first transistor allowing first current to flow through the first current path according to input signal. The second current path includes second transistor allowing second current having opposite phase to the first current to flow through the second current path according to the first current; first resistor; and third transistor connected to one end of the first resistor and having control terminal connected to the other end of the first resistor. The third current path includes output terminal; fourth transistor allowing current having the same phase as the first current to flow through the third current path according to the input signal; and fifth transistor allowing current having the same phase as the second current to flow through the third current path according to voltage of first node between the first resistor and the third transistor.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Patent number: 8237502
    Abstract: An amplifier with bias stabilizer includes first to forth transistors, an amplifier unit and a resistor. The first transistor and the second transistor are connected in series between first and second power supplies and generate a first current. The third transistor is connected in a current mirror configuration to the second transistor and generates a second current corresponding to the first current. The amplifier unit generates an output signal based on an input signal and includes a fourth transistor, the fourth transistor generating a control voltage according to the second current so as to control the first transistor. The resistor is connected in series to at least one of the first to fourth transistors.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: August 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Patent number: 8026756
    Abstract: A voltage reference circuit is provided with: an operational amplifier circuit; first and second resistor elements; first and second diodes; and first and second transistors. The first resistor element and the first diode are connected in series between a first input terminal of the operational amplifier circuit and a reference level node. The second resistor element and the second diode are connected in series between a second input terminal of the operational amplifier circuit and the reference level node. The first transistor is connected between a power supply node and the first input terminal of the operational amplifier circuit and has a control electrode receiving an output of the operational amplifier circuit. The second transistor is connected between the power supply node and the second input terminal of the operational amplifier circuit and has a control electrode receiving the output of the operational amplifier circuit. The value of R12·ln(n11·n22)/(R12·n12·R11) is adjusted to approximately 23.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: September 27, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20110221517
    Abstract: A reference current generating circuit has: first and second current mirror circuits and first and second output terminals. The first current mirror circuit has: a first transistor of a first polarity being an input-side transistor; and a first resistor connected between a gate of the first transistor and a power supply terminal. The second current mirror circuit has a second transistor of a second polarity being an input-side transistor. An output node of the first current mirror circuit is connected to an input node of the second current mirror circuit, and an input node of the first current mirror circuit is connected to an output node of the second current mirror circuit. A control voltage applied to the gate of the first transistor is output from the first output terminal. A control voltage applied to a gate of the second transistor is output from the second output terminal.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 15, 2011
    Inventor: Tachio Yuasa
  • Patent number: 7956686
    Abstract: A differential amplifier circuit is provided with a first input stage including a transistor pair of a first conductivity type, of which transistor pair receives differential input signals; a first output stage connected to the first input stage; a second input stage including a transistor pair of a second conductivity type different from the first conductivity type, of which transistor pair receives the differential input signals; a second output stage connected to the second input stage; and an output terminal.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20110050197
    Abstract: A reference current or voltage generation circuit which forms a self feedback circuit with a plurality of transistors and generates a reference current or a reference voltage, the reference current or voltage generation circuit including a normally-on type transistor that has a gate connected to a first power supply and is connected between a node and a second power supply. Moreover, a voltage of the node is substantially equal to a voltage of the first power supply when the reference current or voltage generation circuit does not operate, and the voltage of the node fluctuates from the voltage of the first power supply toward a voltage of the second power supply by a predetermined value or more when the reference current or voltage generation circuit operates.
    Type: Application
    Filed: July 20, 2010
    Publication date: March 3, 2011
    Applicant: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20110050342
    Abstract: A push-pull amplifier including first to third current paths. The first current path includes first transistor allowing first current to flow through the first current path according to input signal. The second current path includes second transistor allowing second current having opposite phase to the first current to flow through the second current path according to the first current; first resistor; and third transistor connected to one end of the first resistor and having control terminal connected to the other end of the first resistor. The third current path includes output terminal; fourth transistor allowing current having the same phase as the first current to flow through the third current path according to the input signal; and fifth transistor allowing current having the same phase as the second current to flow through the third current path according to voltage of first node between the first resistor and the third transistor.
    Type: Application
    Filed: July 21, 2010
    Publication date: March 3, 2011
    Applicant: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Patent number: 7852157
    Abstract: A differential amplifier includes a differential amplifier section to generate a current composed of a differential-mode current and a first common-mode current according to a differential-mode component and a common-mode component of an input signal, a common-mode current generator section to generate a common-mode current according to the common-mode component of the input signal, and a current amplifier section to receive the current and the common-mode current, amplify a difference between the current and the common-mode current and output a result.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: December 14, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20100271132
    Abstract: An amplifier circuit includes first transistor of first conductivity type having source connected to first power supply, while having gate connected to input terminal and drain connected to output terminal; transistor of second conductivity type having source connected to second power supply and drain connected to the output terminal; second transistor of the first conductivity type whose source and gate are connected to the source and gate of the first transistor of the first conductivity type, respectively; resistor whose one end connected to drain of the second transistor of the first conductivity type, and an output control circuit; current input terminal connected to the opposite end of the resistor; and voltage output terminal connected to the gate of the transistor of the second conductivity type. The output control circuit controls the gate voltage of the transistor of the second conductivity type based on the input current of the current input terminal.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 28, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tachio Yuasa
  • Publication number: 20100264987
    Abstract: An amplifier with bias stabilizer includes first to forth transistors, an amplifier unit and a resistor. The first transistor and the second transistor are connected in series between first and second power supplies and generate a first current. The third transistor is connected in a current mirror configuration to the second transistor and generates a second current corresponding to the first current. The amplifier unit generates an output signal based on an input signal and includes a fourth transistor, the fourth transistor generating a control voltage according to the second current so as to control the first transistor. The resistor is connected in series to at least one of the first to fourth transistors.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 21, 2010
    Inventor: Tachio YUASA
  • Patent number: 7816989
    Abstract: A differential amplifier includes a first differential pair formed by transistors of a first conductivity type, to receive input signals and output first differential-mode currents, a first current amplifier section to output a first output source current and a first output sink current to a first output terminal and a second output terminal, respectively, based on the first differential-mode currents, a second differential pair formed by transistors of a second conductivity type, to receive the input signals and output second differential-mode currents, and a second current amplifier section to output a second output source current and a second output sink current to the first output terminal and the second output terminal, respectively, based on the second differential-mode currents.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: October 19, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Patent number: 7688140
    Abstract: Disclosed is a differential amplifier circuit that comprises: a first differential pair of a first conductivity type having an input pair connected to respective input terminals and an output pair connected to a load-element pair; a second differential pair of a second conductivity type having an input pair connected to the respective input terminals and an output pair connected to a load-element pair; a first output transistor connected between a first power supply and an output terminal and having a control terminal connected to a first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and having a control terminal connected to a first output of the second differential pair.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 30, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20100007417
    Abstract: A differential amplifier circuit is provided with a first input stage including a transistor pair of a first conductivity type, of which transistor pair receives differential input signals; a first output stage connected to the first input stage; a second input stage including a transistor pair of a second conductivity type different from the first conductivity type, of which transistor pair receives the differential input signals; a second output stage connected to the second input stage; and an output terminal.
    Type: Application
    Filed: December 19, 2008
    Publication date: January 14, 2010
    Applicant: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20090322416
    Abstract: A voltage reference circuit is provided with: an operational amplifier circuit; first and second resistor elements; first and second diodes; and first and second transistors. The first resistor element and the first diode are connected in series between a first input terminal of the operational amplifier circuit and a reference level node. The second resistor element and the second diode are connected in series between a second input terminal of the operational amplifier circuit and the reference level node. The first transistor is connected between a power supply node and the first input terminal of the operational amplifier circuit and has a control electrode receiving an output of the operational amplifier circuit. The second transistor is connected between the power supply node and the second input terminal of the operational amplifier circuit and has a control electrode receiving the output of the operational amplifier circuit. The value of R12·ln(n11·n22)/(R12·n12·R11) is adjusted to approximately 23.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 31, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20090231039
    Abstract: A differential amplifier includes a first differential pair formed by transistors of a first conductivity type, to receive input signals and output first differential-mode currents, a first current amplifier section to output a first output source current and a first output sink current to a first output terminal and a second output terminal, respectively, based on the first differential-mode currents, a second differential pair formed by transistors of a second conductivity type, to receive the input signals and output second differential-mode currents, and a second current amplifier section to output a second output source current and a second output sink current to the first output terminal and the second output terminal, respectively, based on the second differential-mode currents.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 17, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20090231038
    Abstract: A differential amplifier includes a differential amplifier section to generate a current composed of a differential-mode current and a first common-mode current according to a differential-mode component and a common-mode component of an input signal, a common-mode current generator section to generate a common-mode current according to the common-mode component of the input signal, and a current amplifier section to receive the current and the common-mode current, amplify a difference between the current and the common-mode current and output a result.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 17, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tachio Yuasa
  • Patent number: 7515436
    Abstract: In a communication unit 100, a ground layer section 101 which is a sheet-like conductive material and a power-source layer section 102 which is a sheet-like conductive material are laid out in such a way that their one sides face each other, a voltage is applied in such a way that the power-source layer section 102 has a predetermined reference electric potential to the ground layer section 101, a plurality of conductive layer sections 103 which are sheet-like conductive materials are laid out between the ground layer section 101 and the power-source layer section 102, each conductive layer section 103 and the power-source layer section 102 are coupled together by a pull resistor section 104, a transmission communication element transmits a signal by changing the electric potential of the conductive layer section 103 connected to that communication element with respect to the ground layer section 101, and a reception communication element receives the signal by directly or indirectly detecting a change in ele
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: April 7, 2009
    Assignee: Cell Cross Corporation
    Inventors: Hiroyuki Shinoda, Naoya Asamura, Keiji Matsumoto, Yuichi Kasahara, Xinyu Wang, Tachio Yuasa, Takayuki Iwamoto, Yousuke Morishita
  • Publication number: 20080079491
    Abstract: Disclosed is a differential amplifier circuit that comprises: a first differential pair of a first conductivity type having an input pair connected to respective input terminals and an output pair connected to a load-element pair; a second differential pair of a second conductivity type having an input pair connected to the respective input terminals and an output pair connected to a load-element pair; a first output transistor connected between a first power supply and an output terminal and having a control terminal connected to a first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and having a control terminal connected to a first output of the second differential pair.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 3, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tachio Yuasa
  • Publication number: 20070117520
    Abstract: In a communication unit 100, a ground layer section 101 which is a sheet-like conductive material and a power-source layer section 102 which is a sheet-like conductive material are laid out in such a way that their one sides face each other, a voltage is applied in such a way that the power-source layer section 102 has a predetermined reference electric potential to the ground layer section 101, aplurality of conductive layer sections 103 which are sheet-like conductive materials are laid out between the ground layer section 101 and the power-source layer section 102, each conductive layer section 103 and the power-source layer section 102 are coupled together by a pull-resistor section 104, communication elements are so connected as to be laid over the individual conductive layer sections 103, a transmission communication element connected to a conductive layer section 103 transmits a signal by changing the electric potential of the conductive layer section 103 connected to that communication element with re
    Type: Application
    Filed: June 18, 2004
    Publication date: May 24, 2007
    Inventors: Naoya Asamura, Hiroyuki Shinoda, Keiji Matsumoto, Yuichi Kasahara, Xinyu Wang, Tachio Yuasa, Takayuki Iwamoto, Yousuke Morishita