Abstract: A flat panel display device is disclosed. In one embodiment, the flat panel display device includes i) a semiconductor layer including a channel region and a groove, wherein the channel region electrically connects a source electrode and a drain electrode, and the groove is configured to separate the channel region from adjacent thin film transistors and ii) a stop layer formed below at least a portion of the semiconductor layer. According to one embodiment of the invention, a semiconductor layer can be easily patterned without using a dry or wet etching technique such as photolithography.

Abstract: A flat panel display device is disclosed. In one embodiment, the flat panel display device includes i) a semiconductor layer including a channel region and a groove, wherein the channel region electrically connects a source electrode and a drain electrode, and the groove is configured to separate the channel region from adjacent thin film transistors and ii) a stop layer formed below at least a portion of the semiconductor layer. According to one embodiment of the invention, a semiconductor layer can be easily patterned without using a dry or wet etching technique such as photolithography.

Abstract: A thin film transistor including a stop layer is disclosed. In one embodiment, the thin film transistor includes a substrate, a gate electrode formed on the substrate, a source electrode and a drain electrode insulated from the gate electrode, a semiconductor layer insulated from the gate electrode and having: a channel region which is electrically connected to the source electrode and the drain electrode, and a groove for separating at least the channel region from adjacent thin film transistors, and a stop layer formed below the semiconductor layer. According to one embodiment of the invention, a semiconductor layer can be easily patterned without using a dry or wet etching technique such as photolithography.

Abstract: A thin film transistor including a stop layer is disclosed. In one embodiment, the thin film transistor includes a substrate, a gate electrode formed on the substrate, a source electrode and a drain electrode insulated from the gate electrode, a semiconductor layer insulated from the gate electrode and having: a channel region which is electrically connected to the source electrode and the drain electrode, and a groove for separating at least the channel region from adjacent thin film transistors, and a stop layer formed below the semiconductor layer. According to one embodiment of the invention, a semiconductor layer can be easily patterned without using a dry or wet etching technique such as photolithography.