Patents by Inventor Tadaaki Kaneko

Tadaaki Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12131960
    Abstract: To provide a new temperature distribution evaluation method, a temperature distribution evaluation device, and a soaking range evaluation method, as the temperature distribution evaluation method which evaluates a temperature distribution of a heating area 40A provided in a heating device 40, the present invention is a temperature distribution evaluation method which, in the heating area 40A, heats a semiconductor substrate 10 and a transmitting and receiving body 20 for transporting a raw material to and from the semiconductor substrate 10, and evaluates a temperature distribution of the heating area 40A on the basis of a substrate thickness variation amount A of the semiconductor substrate 10. Accordingly, temperature distribution evaluation can be implemented for a high temperature area at 1600-2200° C. or the like at which it is hard to evaluate the temperature distribution due to the limit of a thermocouple material.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: October 29, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Daichi Dojima, Koji Ashida, Tomoya Ihara
  • Publication number: 20240328776
    Abstract: The present invention addresses the problem of providing a novel technology for measuring an etching amount in heat treatment in which growth and etching proceed simultaneously. The present invention includes: a first substrate thickness measuring step S10 for measuring the thickness 10D of a to-be-heat-treated semiconductor substrate 10; a second substrate thickness measuring step S20 for measuring the thickness 20D of a heat-treated semiconductor substrate 20; a growth layer thickness measuring step S30 for measuring the thickness 21D of a growth layer 21 which has gone through crystal growth by heat treatment; and an etching amount calculating step S40 for calculating the etching amount ED on the basis of the thickness 10D of the to-be-heat-treated semiconductor substrate 10, the thickness 20D of the heat-treated semiconductor substrate 20, and the thickness 21D of the growth layer 21.
    Type: Application
    Filed: January 7, 2022
    Publication date: October 3, 2024
    Inventors: Tadaaki KANEKO, Kiyoshi KOJIMA
  • Patent number: 12098476
    Abstract: The present invention addresses the problem of providing a novel SiC substrate production method. The SiC substrate production method according to the present invention comprises an etching step S10 of etching a SiC base substrate 10, a crystal growth step S20 of growing a SiC substrate layer 13 on the SiC base substrate 10 to produce a SiC substrate body 20, and a peeling step S30 of peeling at least a portion of the SiC substrate body 20 to produce a SiC substrate 30, the method being characterized in that each of the etching step S10 and the crystal growth step S20 is a step of arranging the SiC base substrate 10 and a SiC material 40 so as to face each other and heating the SiC base substrate 10 and the SiC material 40 so as to form a temperature gradient between the SiC base substrate 10 and the SiC material 40.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: September 24, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Kiyoshi Kojima
  • Patent number: 12065758
    Abstract: An apparatus for producing an SiC substrate, by which an SiC substrate having a thin base substrate layer is able to be produced, while suppressing deformation or breakage, includes a main container which is capable of containing an SiC base substrate, and which produces a vapor pressure of a vapor-phase species containing elemental Si and a vapor-phase species containing elemental C within the internal space by means of heating; and a heating furnace which contains the main container and heats the main container so as to form a temperature gradient, while producing a vapor pressure of a vapor-phase species containing elemental Si within the internal space. The main container has a growth space in which a growth layer is formed on one surface of the SiC base substrate, and an etching space in which the other surface of the SiC base substrate is etched.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 20, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Natsuki Yoshida, Kazufumi Aoki
  • Publication number: 20240241064
    Abstract: An object of the present invention is to provide a novel technique capable of evaluating a subsurface damaged layer without destroying a semiconductor single crystal. As means for solving this object, the present invention causing a laser light to be incident from a surface of a semiconductor single crystal substrate to evaluate the subsurface damaged layer of the semiconductor single crystal substrate based on an intensity of a scattered light which is scattered inside the semiconductor single crystal substrate.
    Type: Application
    Filed: January 14, 2022
    Publication date: July 18, 2024
    Inventors: Tadaaki KANEKO, Yoshinobu NAKURA, Kazunobu ASAKAWA, Kiyoshi KOJIMA
  • Patent number: 12020928
    Abstract: An object of the present invention is to provide a SiC semiconductor substrate capable of reducing a density of basal plane dislocations (BPD) in a growth layer, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a strained layer removal process S10 that removes a strained layer introduced on a surface of a SiC substrate; and an epitaxial growth process S20 that conducts growth under a condition that a terrace width W of the SiC substrate is increased. When a SiC semiconductor substrate is manufactured in such processes, the basal plane dislocations BPD in the growth layer can be reduced, and a yield of a SiC semiconductor device can be improved.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: June 25, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Koji Ashida, Tomoya Ihara, Daichi Dojima
  • Patent number: 12014939
    Abstract: Provided are a method for etching and growing a semiconductor substrate in the same device system, and a device therefor. The method for manufacturing a semiconductor substrate includes a first heating step of heating a heat treatment space which contains a semiconductor substrate and a transmission/reception body that transports atoms between the semiconductor substrate and the transmission/reception body such that a temperature gradient is formed between the semiconductor substrate and the transmission/reception body, and a second heating step of heating the same with the temperature gradient being vertically inverted.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: June 18, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventor: Tadaaki Kaneko
  • Patent number: 11972949
    Abstract: A device for manufacturing a SiC substrate, in which the occurrence of a work-affected layer is reduced, or from which a work-affected layer is removed, comprises: a main container which can accommodate a SiC substrate and which generates, by heating, a vapor pressure of a vapor-phase species including elemental Si and a vapor-phase species including elemental C in an internal space; and a heating furnace for accommodating the main container, generating a vapor pressure of the vapor-phase species including elemental Si in the internal space, and heating so that a temperature gradient is formed; the main container having an etching space formed by causing a portion of the main container disposed on the low-temperature side of the temperature gradient and the SiC substrate to face each other in a state in which the SiC substrate is disposed on the high-temperature side of the temperature gradient.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: April 30, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Natsuki Yoshida, Kazufumi Aoki
  • Patent number: 11952678
    Abstract: The present invention addresses the problem of providing a novel method for manufacturing a SiC substrate, and a manufacturing device for said method. The present invention realizes: a method for manufacturing a SiC substrate, comprising heating two mutually opposing SiC single-crystal substrates and transporting a raw material from one SiC single-crystal substrate to the other SiC single-crystal substrate; and a manufacturing device for said method. Through the present invention, each of the mutually opposing SiC single-crystal substrate surfaces can be used as a raw material for crystal growth of the other SiC single-crystal substrate surface, and it is therefore possible to realize a highly economical method for manufacturing a SiC substrate.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: April 9, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventor: Tadaaki Kaneko
  • Patent number: 11955354
    Abstract: Provided is a semiconductor substrate manufacturing device which is capable of uniformly heating the surface of a semiconductor substrate that has a relatively large diameter or major axis. The semiconductor substrate manufacturing device includes a container body for accommodating a semiconductor substrate and a heating furnace that has a heating chamber which accommodates the container body, and the heating furnace has a heating source in a direction intersecting the semiconductor substrate to be disposed inside the heating chamber.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 9, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventor: Tadaaki Kaneko
  • Patent number: 11932967
    Abstract: An object of the present invention is to provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation. In order to solve the above problems, the present invention provides a method for producing SiC single crystals, including a stress reduction step of heating a SiC single crystal at 1800° C. or higher in an atmosphere containing Si and C elements to reduce internal stress in the SiC single crystal. With this configuration, the present invention can provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: March 19, 2024
    Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventor: Tadaaki Kaneko
  • Publication number: 20240068958
    Abstract: An object of the present invention is to provide a novel technology capable of evaluating a subsurface damaged layer without destroying a semiconductor substrate. As means for solving this object, the present invention includes a measurement step of causing laser light having penetration characteristics to be incident from a surface of a semiconductor substrate having a subsurface damaged layer under the surface and measuring an intensity of scattered light scattered under the surface, and an evaluation step of evaluating the subsurface damaged layer on the basis of the intensity of the scattered light obtained in the measurement step.
    Type: Application
    Filed: December 9, 2022
    Publication date: February 29, 2024
    Inventors: Tadaaki KANEKO, Daichi DOJIMA, Kazunobu ASAKAWA
  • Publication number: 20240044042
    Abstract: Disclosed is a method for using a SiC container (3) in which Si vapor and C vapor are generated in the internal space during the heat treatment. The SiC container may be heated in Si atmosphere to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space. The SiC container may be heated in a TaC container of a material including TaC supplemented with a source of Si to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Applicants: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATION
    Inventors: Tadaaki Kaneko, Yasunori Kutsuma, Koji Ashida, Ryo Hashimoto
  • Publication number: 20240020814
    Abstract: An object of the present invention is to provide a novel technique for evaluating a heat treatment environment. The present invention is a method for evaluating a heat treatment environment, the method comprising an image acquisition step of acquiring an image by making an electron beam incident at an incident angle inclined with respect to a normal line of a {0001} plane of a heat-treated silicon carbide substrate and an environment evaluation step of evaluating a heat treatment environment of the silicon carbide substrate on a basis of on contrast information of the image.
    Type: Application
    Filed: October 27, 2021
    Publication date: January 18, 2024
    Inventors: Tadaaki KANEKO, Daichi DOJIMA
  • Publication number: 20230411225
    Abstract: An object of the present invention is to provide a novel evaluation method suitable for evaluating a SiC substrate having a large diameter. The present invention is a method for evaluating a silicon carbide substrate, the method comprising an image acquisition step of acquiring an image by making an electron beam incident at an incident angle inclined with respect to a normal line of a {0001} plane of a silicon carbide substrate, wherein the incident angle is 10° or less.
    Type: Application
    Filed: October 27, 2021
    Publication date: December 21, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA
  • Publication number: 20230392282
    Abstract: A problem addressed by the present invention is to provide a novel technique with which is possible to suppress the introduction of dislocation into a growth layer. The present invention, which solves the above problem, is a method for producing an aluminum nitride substrate, the method including a processing step for removing part of silicon carbide substrate and forming a pattern that includes a minor angle, and a crystal growth step for forming an aluminum nitride growth layer on the silicon carbide substrate on which the patter has been formed. The present invention is also a method for suppressing the introduction of dislocation into the aluminum nitride growth layer, the method including a processing step for removing part of the silicon carbide substrate and forming a pattern that includes a minor angle before forming a growth layer on a base substrate.
    Type: Application
    Filed: March 30, 2021
    Publication date: December 7, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA, Taku MURAKAWA, Moeko MATSUBARA, Yoshitaka NISHIO
  • Publication number: 20230304186
    Abstract: An object of the present invention is to provide a novel technique capable of manufacturing a large-diameter AlN substrate. The present invention is a method for manufacturing an AlN substrate, including a crystal growth step S30 of forming an AlN layer 20 on a SiC underlying substrate 10 having through holes 11. In addition, the present invention is a method for forming an AlN layer including the through hole formation step S20 of forming the through holes 11 in the SiC underlying substrate 10 before forming the AlN layer 20 on the SiC underlying substrate 10.
    Type: Application
    Filed: March 30, 2021
    Publication date: September 28, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA, Moeko MATSUBARA, Yoshitaka NISHIO
  • Publication number: 20230212785
    Abstract: The problem to be solved by the present invention is to provide a novel technique that can remove a strained layer introduced into an aluminum nitride substrate. In order to solve this problem, the present aluminum nitride substrate manufacturing method involves a strained layer removal step for removing a strained layer in an aluminum nitride substrate by heat treatment of the aluminum nitride substrate in a nitrogen atmosphere. In this way, the present invention can remove a strained layer that has been introduced into an aluminum nitride substrate.
    Type: Application
    Filed: March 30, 2021
    Publication date: July 6, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA, Moeko MATSUBARA, Yoshitaka NISHIO
  • Publication number: 20230203704
    Abstract: An object of the present invention is to provide a novel technique capable of suppressing the occurrence of cracks in the growth layer. The present invention is a method for manufacturing a semiconductor substrate, which includes: an embrittlement processing step S10 of reducing strength of an underlying substrate 10; and a crystal growth step S20 of forming the growth layer 20 on the underlying substrate 10. In addition, the present invention is a method for suppressing the occurrence of cracks in the growth layer 20, and this method includes an embrittlement processing step S10 of reducing the strength of the underlying substrate 10 before forming the growth layer 20 on the underlying substrate 10.
    Type: Application
    Filed: March 30, 2021
    Publication date: June 29, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA
  • Publication number: 20230197456
    Abstract: The problem to addressed by the present invention is that of providing a novel technique that can remove a strained layer introduced into a silicon carbide substrate by laser processing. The present silicon carbide substrate manufacturing method involves a processing step for performing laser processing to remove part of a silicon carbide substrate by irradiating the silicon carbide substrate with a laser, and a strained layer removal step for removing a strained layer that was introduced in the silicon carbide substrate by the aforementioned processing step involving heat treatment of the silicon carbide substrate. In this way, the present invention, which is a method of removing a strained layer introduced into a silicon carbide substrate by laser processing, involves a strained layer removal step for heat treating the silicon carbide substrate.
    Type: Application
    Filed: March 30, 2021
    Publication date: June 22, 2023
    Inventors: Tadaaki KANEKO, Daichi DOJIMA