Patents by Inventor Tadaaki Kinoshita
Tadaaki Kinoshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9946610Abstract: According to one embodiment, a memory device saves data of a volatile memory to a first nonvolatile memory in response to an event of power loss. After recovery of power, based on management data indicating a relationship between an identifier of each of programs executed by a host system and address data of each of a plurality of regions of the volatile memory being used respectively by the programs, the memory device identifies a region of the first nonvolatile memory where the data of the region of the volatile memory being used by a first program of the programs before the power loss has been saved. The memory device restores the data stored in the identified region into a first region of the volatile memory newly allocated to the first program by the host system.Type: GrantFiled: November 9, 2015Date of Patent: April 17, 2018Assignee: Toshiba Memory CorporationInventor: Tadaaki Kinoshita
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Publication number: 20170060706Abstract: According to one embodiment, a memory device saves data of a volatile memory to a first nonvolatile memory in response to an event of power loss. After recovery of power, based on management data indicating a relationship between an identifier of each of programs executed by a host system and address data of each of a plurality of regions of the volatile memory being used respectively by the programs, the memory device identifies a region of the first nonvolatile memory where the data of the region of the volatile memory being used by a first program of the programs before the power loss has been saved. The memory device restores the data stored in the identified region into a first region of the volatile memory newly allocated to the first program by the host system.Type: ApplicationFiled: November 9, 2015Publication date: March 2, 2017Inventor: Tadaaki Kinoshita
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Patent number: 8145858Abstract: According to one embodiment, an interleave control device of a memory system includes a memory divided into sections, and a data bus used, in common, for data transfers for the sections, the device comprises a detector and a start module. The detector is configured to detect a transfer of data of a predetermined size during a transfer of data on the data bus to be written to a certain section of the memory or data read from the section. The start module is configured to start a transfer of interleave control data in place of the data to be written or the read data when the detector detects the transfer of the data of the predetermined size.Type: GrantFiled: July 9, 2010Date of Patent: March 27, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Tadaaki Kinoshita
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Patent number: 7890838Abstract: According to one embodiment, a storage apparatus includes a first nonvolatile storage module, a second nonvolatile storage module, and an error checking and correction module. The first nonvolatile storage module undergoes a destructive read when data is read from it. The second nonvolatile storage module stores the address data representing the storage location in the first nonvolatile storage module at which data to be read is stored. The error checking and correction module checks for and corrects an error in the data stored at the storage location in the first nonvolatile storage module which is represented by the address data stored. The error checking and correction module writes the corrected data back into the first nonvolatile storage module.Type: GrantFiled: October 26, 2009Date of Patent: February 15, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Tadaaki Kinoshita
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Publication number: 20110010511Abstract: According to one embodiment, an interleave control device of a memory system includes a memory divided into sections, and a data bus used, in common, for data transfers for the sections, the device comprises a detector and a start module. The detector is configured to detect a transfer of data of a predetermined size during a transfer of data on the data bus to be written to a certain section of the memory or data read from the section. The start module is configured to start a transfer of interleave control data in place of the data to be written or the read data when the detector detects the transfer of the data of the predetermined size.Type: ApplicationFiled: July 9, 2010Publication date: January 13, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki KINOSHITA
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Publication number: 20100162080Abstract: According to one embodiment, a storage apparatus includes a first nonvolatile storage module, a second nonvolatile storage module, and an error checking and correction module. The first nonvolatile storage module undergoes a destructive read when data is read from it. The second nonvolatile storage module stores the address data representing the storage location in the first nonvolatile storage module at which data to be read is stored. The error checking and correction module checks for and corrects an error in the data stored at the storage location in the first nonvolatile storage module which is represented by the address data stored. The error checking and correction module writes the corrected data back into the first nonvolatile storage module.Type: ApplicationFiled: October 26, 2009Publication date: June 24, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki KINOSHITA
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Publication number: 20090240870Abstract: According to one embodiment, a counter counts bits having a predetermined logical value contained in accessed data to be written or read in an access process of accessing any of the physical blocks provided in a selected one of the nonvolatile memory devices. A timer measures an access busy period in the access process. A control module updates an access busy period data item stored in a busy period storage module and concerning the selected one, in accordance with a count value of the counter, whereby the access busy period data item represents the access busy period measured.Type: ApplicationFiled: January 28, 2009Publication date: September 24, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki KINOSHITA
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Publication number: 20080320212Abstract: According to one embodiment, the control device according to an embodiment of the present invention, facilitates and speeds up averaging processing of the number of erases of a physical block (exchange processing of a physical block) of a nonvolatile memory. The device includes a file system control section that analyzes a file system of a nonvolatile memory and identifies a logical block of a read-only file, a logical/physical block address conversion table management section that obtains a first physical block corresponded to the logical block, and a physical block information management section that selects a second physical block that can be optionally used. Further, the device includes a physical block information modification section that moves data of the first physical block to the second physical block.Type: ApplicationFiled: June 20, 2008Publication date: December 25, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki Kinoshita
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Publication number: 20080320213Abstract: According to one embodiment, the overall information processing time can be shortened. There are provided (1) a logical/physical block address conversion table information section that associates a logical block address of a logical address space with a physical block address of a nonvolatile memory device, (2) a physical block use state management section and a physical block erase count management section to read out erase count information from a physical block of which the logical block address and the physical block address are not associated, and a physical block that satisfies a predetermined condition set related to the erase count information is selected as a selected physical block, and (3) a logical/physical block address conversion table management section that registers a physical block address of the selected physical block in the logical/physical block address conversion table.Type: ApplicationFiled: June 25, 2008Publication date: December 25, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki Kinoshita
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Publication number: 20080320211Abstract: According to an embodiment of the present invention is to increase the number of arbitrarily available physical blocks in a nonvolatile memory device. The device comprises a file system control section which analyzes a file allocation table (FAT) to identify an unused logical block, a logical/physical block address conversion table management section which uses a table of a logical/physical block address conversion table information section to obtain a first physical block corresponding to the unused logical block and releases the association between the first physical block and the unused logical block, and a physical block address information management section which registers the first physical block in a physical block address information section as an arbitrarily available second physical block.Type: ApplicationFiled: June 20, 2008Publication date: December 25, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki Kinoshita
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Publication number: 20080184090Abstract: According to one embodiment, a storage apparatus includes: a data transmission unit capable of transmitting data to a host apparatus in a data format in which a content to be transmitted to the host apparatus is accompanied by a CRC; a storage medium in which the content is stored; an error detection unit capable of detecting a reading error occurring in a processing in which the content is read from the storage medium; and an error information recording unit making the error information detected by the error detection unit be stored in an error information storage part. Further, the storage apparatus includes a CRC selection unit capable of selecting, based on the error information, whether to create a normal CRC or to intentionally create a mismatching CRC to make the host apparatus detect a CRC error in creating the CRC concerning the content.Type: ApplicationFiled: December 21, 2007Publication date: July 31, 2008Inventor: Tadaaki KINOSHITA
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Patent number: 7404034Abstract: According to one embodiment, a disk drive device includes a head, a register which stores various commands which are transmitted from the host device, a read/write process unit which executes a read/write control process including a write operation or a read operation, a cache memory which stores write data that is transmitted from the host device and read data that is read out of a disk medium, and a control unit which executes an unload operation of retreating the head to a retreat position that is located outside the disk medium in a case where an unload command is written in the register by the host device during execution of the read/write control process, and controls data transfer between the cache memory and the host device in accordance with the read command or the write command, thereby to continuously execute the read/write control process.Type: GrantFiled: May 25, 2006Date of Patent: July 22, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Tadaaki Kinoshita
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Patent number: 7340580Abstract: A storage device includes a data-readable/writable storage medium, a data-readable/writable nonvolatile memory, and a controller which manages one of respective physical storage areas of the storage medium and the nonvolatile memory as being a logical storage area and which, in response to an access request from an external source, executes access to either one or both of the storage medium and the nonvolatile memory.Type: GrantFiled: August 9, 2005Date of Patent: March 4, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Tadaaki Kinoshita
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Publication number: 20070005872Abstract: An information processing apparatus including a memory device which sets, in a case where the information processing apparatus transmits the packet to the slave device, and receive the packet output from the slave device, a start timing of an open drain output period in which communication is carried out in an open drain mode, and stores data indicating the start timing of the open drain output period, the open drain mode output period being set as an output mode in which each of the packets is output to the bus, and a switching device which switches the output mode to the open drain mode, at the start timing of the open drain output period, and receive the packet output from the slave device.Type: ApplicationFiled: June 22, 2006Publication date: January 4, 2007Inventor: Tadaaki Kinoshita
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Publication number: 20060288157Abstract: According to one embodiment, a disk drive device includes a head, a register which stores various commands which are transmitted from the host device, a read/write process unit which executes a read/write control process including a write operation or a read operation, a cache memory which stores write data that is transmitted from the host device and read data that is read out of a disk medium, and a control unit which executes an unload operation of retreating the head to a retreat position that is located outside the disk medium in a case where an unload command is written in the register by the host device during execution of the read/write control process, and controls data transfer between the cache memory and the host device in accordance with the read command or the write command, thereby to continuously execute the read/write control process.Type: ApplicationFiled: May 25, 2006Publication date: December 21, 2006Inventor: Tadaaki Kinoshita
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Publication number: 20060143378Abstract: An information processing apparatus includes a obtaining circuit to obtain control information necessary for an operation requested through a communication with the external device upon the occurrence of one of requests to write the information to the first recording medium and to read the information from the first recording medium by use of the second recording medium, and a controller which performs one of writing of the information to the first and second recording media and reading of the information from the first and second recording media, based on the control information.Type: ApplicationFiled: December 12, 2005Publication date: June 29, 2006Inventor: Tadaaki Kinoshita
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Publication number: 20050270877Abstract: A storage device includes a data-readable/writable storage medium, a data-readable/writable nonvolatile memory, and a controller which manages one of respective physical storage areas of the storage medium and the nonvolatile memory as being a logical storage area and which, in response to an access request from an external source, executes access to either one or both of the storage medium and the nonvolatile memory.Type: ApplicationFiled: August 9, 2005Publication date: December 8, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tadaaki Kinoshita
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Publication number: 20050262297Abstract: A disk drive comprises a disk control unit conforming to versatile parallel interfaces. The disk control unit has a register file that includes a plurality of registers a host system can access. The disk drive further comprises an input/output (IO) interface circuit connected to the disk control unit via a parallel interface. The IO interface circuit is connectable to a memory interface circuit incorporated in the host system. The IO interface circuit utilizes a protocol for parallel interfaces to communicate with the disk control unit, and utilizes a protocol for serial interfaces to communicate with the memory interface circuit.Type: ApplicationFiled: April 11, 2005Publication date: November 24, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yutaka Arakawa, Tadaaki Kinoshita