Patents by Inventor Tadaaki Maeda
Tadaaki Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11843080Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element that emits ultraviolet light, a package substrate mounting the semiconductor light-emitting element, a sealing resin that seals the semiconductor light-emitting element, and a coat film further provided between a light output surface of the semiconductor light-emitting element and the sealing resin. The refractive index of the coat film and the refractive index of the sealing resin are smaller than the refractive index of a member constituting the light output surface of the semiconductor light-emitting element, and the refractive index difference between the coat film and the sealing resin is not more than 0.15.Type: GrantFiled: October 12, 2018Date of Patent: December 12, 2023Assignee: Nikkiso Co., Ltd.Inventors: Shuichiro Yamamoto, Tadaaki Maeda, Naoki Shibata
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Patent number: 11677052Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element having a supporting substrate and a sealing member located above the supporting substrate, a mounting substrate on which the semiconductor light-emitting element is mounted in such a manner that the sealing member faces the mounting substrate, and a sealing part that integrally covers a part of the supporting substrate and a side surface of the sealing member and seals the semiconductor light-emitting element and the mounting substrate.Type: GrantFiled: June 6, 2019Date of Patent: June 13, 2023Assignee: Nikkiso Co., Ltd.Inventors: Hiroyasu Ichinokura, Tadaaki Maeda, Kazuyoshi Sakuragi
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Publication number: 20210249573Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element having a supporting substrate and a sealing member located above the supporting substrate, a mounting substrate on which the semiconductor light-emitting element is mounted in such a manner that the sealing member faces the mounting substrate, and a sealing part that integrally covers a part of the supporting substrate and a side surface of the sealing member and seals the semiconductor light-emitting element and the mounting substrate.Type: ApplicationFiled: June 6, 2019Publication date: August 12, 2021Applicant: NIKKISO CO., LTD.Inventors: Hiroyasu ICHINOKURA, Tadaaki MAEDA, Kazuyoshi SAKURAGI
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Publication number: 20200365779Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element that emits ultraviolet light, a package substrate mounting the semiconductor light-emitting element, a sealing resin that seals the semiconductor light-emitting element, and a coat film further provided between a light output surface of the semiconductor light-emitting element and the sealing resin. The refractive index of the coat film and the refractive index of the sealing resin are smaller than the refractive index of a member constituting the light output surface of the semiconductor light-emitting element, and the refractive index difference between the coat film and the sealing resin is not more than 0.15.Type: ApplicationFiled: October 12, 2018Publication date: November 19, 2020Applicant: NIKKISO CO., LTD.Inventors: Shuichiro YAMAMOTO, Tadaaki MAEDA, Naoki SHIBATA
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Patent number: 8274667Abstract: Raster image data is converted into block vector image data corresponding to blocks each having a predetermined size by segmenting the raster image data into the blocks with the predetermined size and executing vectorization processing. The input raster image data is converted into a block vector image. The converted block vector image is stored in a storage means. Transfer of the image data as a processing target in the apparatus is controlled to output the raster image data obtained by rasterizing the stored block vector image data.Type: GrantFiled: May 22, 2006Date of Patent: September 25, 2012Assignee: Canon Kabushiki KaishaInventors: Masakazu Kitora, Nobuaki Matsui, Keishi Inaba, Tadaaki Maeda
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Patent number: 7894085Abstract: A image forming apparatus 100 has a network interface 103 for receiving data transmitted from an external apparatus, and a control unit 102 for interpreting content of data received by the network interface 103. The image forming apparatus 100 further has a printing unit 101 for executing print processing based upon print data if print data has been received by the network interface 103, and a restoration control unit 107 for exercising control so as to place the control unit 102 in an active state or inactive state. The restoration control unit 107 of the image forming apparatus 100 starts supplying a low-speed clock to the control unit 102 in the inactive state in response to receipt of data by the network interface 103, and starts supplying a high-speed clock in response to an interpretation by the control unit 102 that the content of the data is print data.Type: GrantFiled: September 26, 2006Date of Patent: February 22, 2011Assignee: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Patent number: 7640441Abstract: A printer has a controller configured to give an instruction to a LAN controller, the instruction specifying which one of communication speeds the LAN controller should communicate at. When it is determined that the mode of the printer is changed from a power mode in which power is supplied to the controller to a power mode in which power is not supplied to the controller, the controller instructs the LAN controller to reduce the communication speed. After the instruction to reduce the communication speed is given, a power supply unit cuts off power supply to the controller.Type: GrantFiled: March 29, 2007Date of Patent: December 29, 2009Assignee: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Publication number: 20080273218Abstract: Raster image data is converted into block vector image data corresponding to blocks each having a predetermined size by segmenting the raster image data into the blocks with the predetermined size and executing vectorization processing. The input raster image data is converted into a block vector image. The converted block vector image is stored in a storage means. Transfer of the image data as a processing target in the apparatus is controlled to output the raster image data obtained by rasterizing the stored block vector image data.Type: ApplicationFiled: May 22, 2006Publication date: November 6, 2008Applicant: Canon Kabushiki KaishaInventors: Masakazu Kitora, Nobuaki Matsui, Keishi Inaba, Tadaaki Maeda
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Patent number: 7388800Abstract: When it is detected that the voltage of a main power supply is reduced below a predetermined value during a normal operation, a power controller switches a power supply for a DRAM from the main power supply to a battery power supply and makes an instruction signal for instruction a self-refresh mode to a memory controller active. In response to this, the memory controller changes a clock enable signal for the DRAM to a low level to establish the self-refresh mode of the DRAM, and, after, the self-refresh mode of the DRAM is established, supplying of power to the memory controller is stopped. The clock enable signal for the DRAM is maintained to the low level by pull-down resistance even when the supplying of power to the memory controller is stopped from a condition that the signal is changed to the low level in the self-refresh mode, thereby maintaining the self-refresh mode of the DRAM.Type: GrantFiled: July 13, 2005Date of Patent: June 17, 2008Assignee: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Patent number: 7380034Abstract: In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.Type: GrantFiled: April 21, 2005Date of Patent: May 27, 2008Assignee: Canon Kabushiki KaishaInventors: Takafumi Fujiwara, Katsunori Kato, Noboru Yokoyama, Atsushi Date, Tadaaki Maeda
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Publication number: 20070240004Abstract: A printer has a controller configured to give an instruction to a LAN controller, the instruction specifying which one of communication speeds the LAN controller should communicate at. When it is determined that the mode of the printer is changed from a power mode in which power is supplied to the controller to a power mode in which power is not supplied to the controller, the controller instructs the LAN controller to reduce the communication speed. After the instruction to reduce the communication speed is given, a power supply unit cuts off power supply to the controller.Type: ApplicationFiled: March 29, 2007Publication date: October 11, 2007Applicant: CANON KABUSHIKI KAISHAInventor: Tadaaki Maeda
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Publication number: 20070146775Abstract: A image forming apparatus 100 has a network interface 103 for receiving data transmitted from an external apparatus, and a control unit 102 for interpreting content of data received by the network interface 103. The image forming apparatus 100 further has a printing unit 101 for executing print processing based upon print data if print data has been received by the network interface 103, and a restoration control unit 107 for exercising control so as to place the control unit 102 in an active state or inactive state. The restoration control unit 107 of the image forming apparatus 100 starts supplying a low-speed clock to the control unit 102 in the inactive state in response to receipt of data by the network interface 103, and starts supplying a high-speed clock in response to an interpretation by the control unit 102 that the content of the data is print data.Type: ApplicationFiled: September 26, 2006Publication date: June 28, 2007Applicant: CANON KABUSHIKI KAISHAInventor: Tadaaki Maeda
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Patent number: 7062664Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.Type: GrantFiled: July 31, 2001Date of Patent: June 13, 2006Assignee: Canon Kabushiki KaishaInventors: Atsushi Date, Katsunori Kato, Noboru Yokoyama, Tadaaki Maeda, Takafumi Fujiwara
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Publication number: 20060044580Abstract: An image forming apparatus which is capable of improving the usability of a key macro function provided therein. A plurality of operating keys of the operating section 200 respectively inputs a plurality of pieces of operation information. The inputted plurality of pieces of operation information are registered as a key macro via macro registration mode key 401. It is determined whether the registered key macro is properly executable, before the registered key macro is executed.Type: ApplicationFiled: August 23, 2005Publication date: March 2, 2006Applicant: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Patent number: 6981159Abstract: When power stoppage of a main power supply is detected during a normal operation, a power controller switches a power supply for a DRAM from the main power supply to a battery power supply and makes an instruction signal for instruction a self-refresh mode to a memory controller active. In response to this, the memory controller changes a clock enable signal for the DRAM to a low level to establish the self-refresh mode of the DRAM, and, after, the self-refresh mode of the DRAM is established, supplying of power to the memory controller is stopped. The clock enable signal for the DRAM is maintained to the low level by pull-down resistance even when the supplying of power to the memory controller is stopped from a condition that the signal is changed to the low level in the self-refresh mode, thereby maintaining the self-refresh mode of the DRAM.Type: GrantFiled: February 21, 2002Date of Patent: December 27, 2005Assignee: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Publication number: 20050249011Abstract: When power stoppage of a main power supply is detected during a normal operation, a power controller switches a power supply for a DRAM from the main power supply to a battery power supply and makes an instruction signal for instruction a self-refresh mode to a memory controller active. In response to this, the memory controller changes a clock enable signal for the DRAM to a low level to establish the self-refresh mode of the DRAM, and, after, the self-refresh mode of the DRAM is established, supplying of power to the memory controller is stopped. The clock enable signal for the DRAM is maintained to the low level by pull-down resistance even when the supplying of power to the memory controller is stopped from a condition that the signal is changed to the low level in the self-refresh mode, thereby maintaining the self-refresh mode of the DRAM.Type: ApplicationFiled: July 13, 2005Publication date: November 10, 2005Applicant: Canon Kabushiki KaishaInventor: Tadaaki Maeda
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Patent number: 6952747Abstract: In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.Type: GrantFiled: December 9, 2002Date of Patent: October 4, 2005Assignee: Canon Kabushiki KaishaInventors: Takafumi Fujiwara, Katsunori Kato, Noboru Yokoyama, Atsushi Date, Tadaaki Maeda
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Publication number: 20050188139Abstract: In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.Type: ApplicationFiled: April 21, 2005Publication date: August 25, 2005Applicant: Canon Kabushiki KaishaInventors: Takafumi Fujiwara, Katsunori Kato, Noburo Yokoyama, Atsushi Date, Tadaaki Maeda
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Patent number: 6708236Abstract: Bus control apparatus solves the problem that a high-speed bus which supports only burst transfer cannot be used when the boundary of a transfer memory address is not coincident with a unit boundary. A scanner controller and printer controller connected to a G bus capable of performing only burst transfer and a B bus capable of performing even single transfer determine from the address and data length of data to be transferred whether the data does not match the memory boundary. If the data does not match this boundary, a data portion which is not accommodated within the burst transfer unit is single-transferred using the B bus. A data portion which is accommodated within the burst transfer unit is burst-transferred using the G bus.Type: GrantFiled: January 27, 2000Date of Patent: March 16, 2004Assignee: Canon Kabushiki KaishaInventors: Atsushi Date, Katsunori Kato, Noboru Yokoyama, Tadaaki Maeda, Takafumi Fujiwara
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Patent number: RE43995Abstract: A printer has a controller configured to give an instruction to a LAN controller, the instruction specifying which one of communication speeds the LAN controller should communicate at. When it is determined that the mode of the printer is changed from a power mode in which power is supplied to the controller to a power mode in which power is not supplied to the controller, the controller instructs the LAN controller to reduce the communication speed. After the instruction to reduce the communication speed is given, a power supply unit cuts off power supply to the controller.Type: GrantFiled: December 14, 2011Date of Patent: February 12, 2013Assignee: Canon Kabushiki KaishaInventor: Tadaaki Maeda