Patents by Inventor Tadaharu Hashiguchi

Tadaharu Hashiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor chip mounting substrate and semiconductor device using the same
    Patent number: 6803666
    Abstract: A wiring substrate has a semiconductor chip mounting surface. The semiconductor chip mounting surface is provided with a plurality of partially overlapping chip mounting areas capable of mounting a plurality of types of semiconductor chips with different chip sizes. A plurality of groups of conductive pads is formed on the wiring substrate corresponding to the semiconductor chips mountable on the respective chip mounting areas. Any one of the mountable semiconductor chips is mounted on any one of the chip mounting areas. A plurality of conductive pads on the semiconductor chip mounted on one chip mounting area is electrically connected to one of the groups of conductive pads.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: October 12, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuya Takahashi, Tadaharu Hashiguchi, Kazuhiro Yamamoto
  • Semiconductor chip mounting substrate and semiconductor device using the same
    Publication number: 20020140110
    Abstract: A wiring substrate has a semiconductor chip mounting surface. The semiconductor chip mounting surface is provided with a plurality of partially overlapping chip mounting areas capable of mounting a plurality of types of semiconductor chips with different chip sizes. A plurality of groups of conductive pads is formed on the wiring substrate corresponding to the semiconductor chips mountable on the respective chip mounting areas. Any one of the mountable semiconductor chips is mounted on any one of the chip mounting areas. A plurality of conductive pads on the semiconductor chip mounted on one chip mounting area is electrically connected to one of the groups of conductive pads.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 3, 2002
    Inventors: Takuya Takahashi, Tadaharu Hashiguchi, Kazuhiro Yamamoto
  • Substrate for a semiconductor element
    Patent number: D457146
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: May 14, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Yamamoto, Tadaharu Hashiguchi