Patents by Inventor Tadahiko Sugiura

Tadahiko Sugiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5434540
    Abstract: In a high efficiency F-class amplifier, output current may be reduced to cause distortion of the current, or deterioration of high efficiency operation of the amplifier, when an instantaneous output voltage of an amplifying transistor becomes lower than a saturation voltage. To prevent this, the peak value of the high freqency instantaneous output voltage is restricted by a peak value restricting circuit provided in parallel to a load. Thus, an ideal high efficiency amplifier can be provided by avoiding distortion of the output current.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: July 18, 1995
    Assignee: NEC Corporation
    Inventors: Kaizo Yamamoto, Tadahiko Sugiura