Abstract: The present invention provides human cells that can be stably infected with coronavirus, as human cells for research on infection with coronavirus such as SARS-CoV-2, as well as, by utilizing the cells, a method for confirming the presence of a coronavirus in a sample, a method for producing a coronavirus, and a method for evaluating the presence or absence of anti-coronavirus activity of a test sample or a substance having an anti-coronavirus neutralizing action in a test sample. Specifically, the present invention relates to a method for preparing a coronavirus-infectious immortalized human myeloid cell, including introducing ACE2 and TMPRSS2 into an immortalized human myeloid cell, and the like.

Abstract: The present invention provides a new antibody against ECSA type Chikungunya virus, WA type Chikungunya virus, and Asian type Chikungunya virus or an antigen-binding fragment of the antibody. The antibody against Chikungunya virus or the antigen-binding fragment of the antibody of the present invention includes a heavy chain variable region or a heavy chain (1), (2), or (3) and a light chain variable region or a light chain (4).

Abstract: The present invention provides a new antibody against ECSA type Chikungunya virus, WA type Chikungunya virus, and Asian type Chikungunya virus or an antigen-binding fragment of the antibody. The antibody against Chikungunya virus or the antigen-binding fragment of the antibody of the present invention includes a heavy chain variable region or a heavy chain (1), (2), or (3) and a light chain variable region or a light chain (4).

Abstract: A thermal insulation waveguide between a high-temperature unit and a low-temperature unit in a vacuum, chamber of an embodiment, the thermal insulation waveguide includes, a first substrate including a first line in the high-temperature unit, a second substrate including a second line in the low temperature unit, and a thermal insulation element connecting the substrates, and including a third line including an inductance component and connecting the first and second lines. The first substrate includes a first capacitor unit connected with the first line. The second substrate includes a second capacitor unit connected with the second line.

Abstract: A wiring board of an embodiment includes a through via, a first insulating film disposed around the through via, a second insulating film disposed around the first insulating film, a third insulating film disposed around the second insulating film and a resin disposed around the third insulating film. The resin includes fillers. The second insulating film has a relative permittivity lower than a relative permittivity of the first insulating film. The third insulating film has a relative permittivity higher than a relative permittivity of the second insulating film.

Abstract: According to an embodiment, an electronic device includes a housing, metal patches, and a first metal member. The housing includes a bottom, a lid, and a side unit. The side unit is disposed to enclose a space between the bottom and the lid. A circuit substrate is disposed on a bottom surface of the bottom. The side unit is conductive and connected to a ground potential. The metal patches are disposed on a lid surface of the lid. The metal patches are arranged periodically in a first direction and a second direction. The second direction intersects the first direction. The metal patches are connected to the ground potential. The first metal member is disposed on the lid surface. The first metal member is connected to the ground potential. The first metal member includes a first portion. The first portion contacts a first surface of the side unit.

Abstract: An antenna device of the present embodiment includes: a first conductive layer connected to a ground potential, a semiconductor device provided above the first conductive layer, a second conductive layer provided above the semiconductor device, a first via connecting the second conductive layer and the first conductive layer, a third conductive layer provided above the second conductive layer, a second via passing through the first opening, and an antenna provided above the third conductive layer. A dielectric is provided between the second conductive layer and the semiconductor device, between the third conductive layer and the second conductive layer, and between the antenna and the third conductive layer. The second conductive layer includes a first opening. The second via connects the third conductive layer and the first conductive layer.

Abstract: According to one embodiment, an electronic device includes a housing, an electronic component, a first conductor, and a second conductor. The housing includes a first plate portion, a second plate portion, and a third plate portion. The first plate portion has a first surface. The second plate portion is separated from the first surface. The third plate portion has a third surface. The electronic component is provided inside the housing. The first conductor is provided inside the first plate portion. The second conductor includes first region and a second region. The second conductor is provided between the first plate portion and the second plate portion. An end of the first region is connected to the first conductor. An opening is provided between at least a portion of the first region and at least a portion of the second region.

Abstract: A connection member according to an embodiment includes a dielectric material, a penetrating via penetrating through the dielectric material, a first metal plane provided in the dielectric material, the first metal plane being perpendicular to an extension direction of the penetrating via, the first metal plane crossing the penetrating via, and a second metal plane provided n or on the dielectric material in parallel with the extension direction of the penetrating via, the second metal plane connected to the first metal plane.

Abstract: A thermal insulation waveguide between a high-temperature unit and a low-temperature unit in a vacuum, chamber of an embodiment, the thermal insulation waveguide includes, a first substrate including a first line in the high-temperature unit, a second substrate including a second line in the low temperature unit, and a thermal insulation element connecting the substrates, and including a third line including an inductance component and connecting the first and second lines. The first substrate includes a first capacitor unit connected with the first line. The second substrate includes a second capacitor unit connected with the second line.

Abstract: A connection member according to an embodiment includes a dielectric material, a penetrating via penetrating through the dielectric material, a first metal plane provided in the dielectric material, the first metal plane being perpendicular to an extension direction of the penetrating via, the first metal plane crossing the penetrating via, and a second metal plane provided n or on the dielectric material in parallel with the extension direction of the penetrating via, the second metal plane connected to the first metal plane.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip, a cap disposed to face the semiconductor chip, and having a through-hole electrode arranged in a through hole, and a bump electrode provided between the semiconductor chip and the cap, wherein the bump electrode is in a protruding shape connecting the semiconductor chip and the through-hole electrode, and wherein at least a portion of the bump electrode is included in the through-hole electrode, and electrically connected thereto, so that the adhesive performance between the cap and the bump electrode can be increased.

Abstract: An EBG structure of an embodiment includes an electrode plane, a first insulating layer provided on the electrode plane, a first metal patch provided on the first insulating layer, a second metal patch provided on the first insulating layer, a second insulating layer provided on the first and second metal patches, an interconnect layer provided on the second insulating layer, a third insulating layer provided on the interconnect layer, a first via connected to the electrode plane and the first metal patch, and a second via connected to the electrode plane and the second metal patch. The second metal patch is separately adjacent to the first metal patch. The interconnect layer has a first opening and a second opening. The first via penetrates through the first opening. The second via penetrates through the second opening.

Abstract: From PBMCs of patients infected with H1N1pdm, three human monoclonal antibodies have been obtained which are capable of binding to an epitope present at residues 40 to 58 in an HA2 region of a hemagglutinin protein derived from H1N1pdm. Further, these antibodies have been found to also have a neutralization activity against subtype H1 and subtype H5 of group 1 influenza A viruses. On the other hand, the three antibodies have also been found to exhibit neither a binding ability nor a neutralization activity against subtype H2 which belongs to the group 1, but in the HA2 region derived from H1N1pdm of which the amino acid at residue 45 is substituted with phenylalanine and the amino acid at residue 47 is substituted with glycine.

Abstract: A circuit board according to an embodiment is one in which a plurality of electronic components is mounted on a printed wiring board. The circuit board includes a semiconductor component that is mounted on the printed wiring board, and the semiconductor component includes a semiconductor device and a first EBG structure formed on or above the semiconductor device. An operating frequency of the semiconductor device exists outside a cutoff band of the first EBG structure, and the first EBG structure is connected to a ground or a power supply of the printed wiring board.

Abstract: A semiconductor package of an embodiment includes: a semiconductor chip having a signal input terminal and a signal output terminal; and a cap unit that is formed on the semiconductor chip. The cap unit includes a concave portion forming a hollow structure between the semiconductor chip and the cap unit, a first through electrode electrically connected to the signal input terminal, and a second through electrode electrically connected to the signal output terminal. Of the inner side surfaces of the concave portion, a first inner side surface and a second inner side surface facing each other are not parallel to each other.

Abstract: According to an embodiment, an electronic device includes a housing, metal patches, and a first metal member. The housing includes a bottom, a lid, and a side unit. The side unit is disposed to enclose a space between the bottom and the lid. A circuit substrate is disposed on a bottom surface of the bottom. The side unit is conductive and connected to a ground potential. The metal patches are disposed on a lid surface of the lid. The metal patches are arranged periodically in a first direction and a second direction. The second direction intersects the first direction. The metal patches are connected to the ground potential. The first metal member is disposed on the lid surface. The first metal member is connected to the ground potential. The first metal member includes a first portion. The first portion contacts a first surface of the side unit.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip, a cap disposed to face the semiconductor chip, and having a through-hole electrode arranged in a through hole, and a bump electrode provided between the semiconductor chip and the cap, wherein the bump electrode is in a protruding shape connecting the semiconductor chip and the through-hole electrode, and wherein at least a portion of the bump electrode is included in the through-hole electrode, and electrically connected thereto, so that the adhesive performance between the cap and the bump electrode can be increased.

Abstract: An EBG (Electromagnetic Band Gap) structure according to an embodiment includes: an electrode that is made of a first conductor; a first insulating layer that is provided on the electrode; a patch unit that is provided in substantially parallel with the electrode on the first insulating layer, the patch unit including a first gap, the patch unit being made of a second conductor; a second insulating layer that is provided on the patch unit; a first via that is provided between the patch unit in the first insulating layer and the electrode and connected to the patch unit and the electrode; and a second via that is provided in the first and second insulating layers, the second via piercing the first gap and being connected to the electrode.

Abstract: An electronic circuit according to an embodiment includes a power supply line having a first EBG pattern, the first EBG pattern including a plurality of first linear parts and a first slit, each of the first linear parts extending along a direction in which the power supply line extends and surrounded by the first slit except one end of the first linear part.