Patents by Inventor Tadahisa Yamamoto

Tadahisa Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7023179
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: April 4, 2006
    Assignee: Sony Corporation
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Patent number: 7023180
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: April 4, 2006
    Assignee: Sony Corporation
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Patent number: 6956357
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: October 18, 2005
    Assignee: Sony Corporation
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Patent number: 6949913
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: September 27, 2005
    Assignee: Sony Corporation
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Publication number: 20050189925
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Application
    Filed: April 11, 2005
    Publication date: September 1, 2005
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Publication number: 20050189926
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Application
    Filed: April 11, 2005
    Publication date: September 1, 2005
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Publication number: 20050189924
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Application
    Filed: April 11, 2005
    Publication date: September 1, 2005
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Publication number: 20040008007
    Abstract: In the case of charging by a charging apparatus having a plurality of input terminals to which external power sources for charging a secondary battery are inputted, it is prevented that a current of the inputted power source is outputted to the outside from the other input terminals for charging which are not used. If there are inputs from a plurality of input terminals, the input power sources are controlled so that the battery is optimally charged. pnp-type transistors Q1 and Q2 are arranged between two input terminals of a terminal 11 for an external power adaptor and a terminal 12 for a holder and a secondary battery E1, respectively. When a control IC 13 detects an input power voltage of one of the transistors, the transistor on the detected side is turned on. If the control IC 13 detects both input power voltages, a priority is allocated under predetermined conditions and the secondary battery E1 is charged by the power source of the higher priority.
    Type: Application
    Filed: May 1, 2003
    Publication date: January 15, 2004
    Inventors: Tamiji Nagai, Kazuo Yamazaki, Tadahisa Yamamoto
  • Patent number: 6650090
    Abstract: A battery pack BP having terminals T1, T2, and T3, a detecting circuit, a signal generating circuit, a temperature, voltage, and current detecting circuit, a switching circuit, and a secondary battery connected to the switching circuit. A first external signal generating unit may be connected to terminals T1 and T2 and a second external signal generating unit may be connected to terminals T2 and T3. The detecting circuit detects whether the first or second external signal generating units has been connected. In so doing, the detecting circuit may detect an impedance of the first external signal generating unit and may detect a terminal voltage of the second external signal generating unit. The on/off operations of the switching circuit SW may be controlled in accordance with the detection result.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: November 18, 2003
    Assignee: Sony Corporation
    Inventors: Tamiji Nagai, Tamon Ikeda, Kazuo Yamazaki, Makoto Kamoshida, Tadahisa Yamamoto, Kuniharu Suzuki
  • Publication number: 20020005709
    Abstract: A battery pack BP is constructed by terminals T1, T2, and T3, a detecting circuit 1, a signal generating circuit 2, a temperature, voltage, and current detecting circuit 3, a switching circuit SW, and a secondary battery BT. An external signal generating unit 4 is connected to the terminals T1 and T2. An external signal generating unit 5 is connected to the terminals T2 and T3. The detecting circuit 1 detects that the external signal generating unit 4 or 5 has been connected. The on/off operations of the switching circuit SW are controlled in accordance with a detection result. The temperature, voltage, and current detecting circuit 3 detects a temperature of the battery pack BP and a terminal voltage and a current of the secondary battery BT. The on/off operations of the switching circuit SW are controlled on the basis of the detected temperature, voltage, and current. A signal is supplied to the signal generating circuit 2 on the basis of the detected temperature, voltage, and current.
    Type: Application
    Filed: April 27, 2001
    Publication date: January 17, 2002
    Inventors: Tamiji Nagai, Tamon Ikeda, Kazuo Yamazaki, Makoto Kamoshida, Tadahisa Yamamoto, Kuniharu Suzuki
  • Patent number: 5136628
    Abstract: A video telephone for transmitting video data of a still picture through an audio signal line includes an image pickup tube for picking up a picture of the still picture, an A/D (analog-to-digital) converter for converting the analog output picked up by the image pick-up tube to the form of a digital signal, a memory for storing the output of the A/D converter as video data, a modulating circuit for modulating the video data stored in the memory into a modulated signal of an occupied frequency band corresponding to a transmission band of the signal line, a circuit for transmitting the modulated output of the modulating circuit to the signal line, a circuit for generating a synchronizing pulse and a frequency-dividing circuit for frequency-dividing the color subcarrier signal to provide signals necessary for the A/D converter, the memory, and the modulating circuit, wherein the video data is a signal which results from thinning the picked-up output at a predetermined ratio.
    Type: Grant
    Filed: June 24, 1988
    Date of Patent: August 4, 1992
    Assignees: Nippon Telegraph and Telephone Corporation, Sony Corporation
    Inventors: Shoji Araki, Yukinobu Takano, Tadahisa Yamamoto, Noriyuki Uchiumi
  • Patent number: 4853271
    Abstract: A ceramic substrate for use in packaging semiconductors is provided. The substrate is nearly rectangular. The end portion of at least one short side of the substrate comprises two outwardly projecting arcuate convex portions with a radius of curvature of Rs, an arcuate inwardly depressed concave portion with a radius of curvature of R.sub.B formed between said convex portions to define a nearly central part of said short side, corner portions with a radius of curvature of Rc each connecting the outside end portion of each arcuate convex portion to each long side of the substrate, and curvature connecting portions with a radius of curvature of Rt each connecting the inside end portion of each arcuate convex portion to each end portion of the arcuate concave portion. A pair of most projecting portions are located in the curvature connecting portions and spaced from each other by a distance corresponding to about one-half of the width of the ceramic substrate.
    Type: Grant
    Filed: January 19, 1988
    Date of Patent: August 1, 1989
    Assignee: Kyocera Corporation
    Inventors: Katsumi Nakamura, Tadahisa Yamamoto