Patents by Inventor Tadahito Fujisawa

Tadahito Fujisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080235650
    Abstract: A pattern creation method, including laying out data of a most extreme end pattern of integrated circuit patterns on a first layer and laying out data of the integrated circuit patterns excluding the most extreme end pattern on a second layer, extracting data of a first most proximate pattern being most proximate to the most extreme end pattern from the second layer and converting the extracted data to a third layer, generating data of a contacting pattern which contacts both the first most proximate pattern and the most extreme end pattern in a fourth layer, generating data of a non-overlapping pattern of the contacting pattern excluding overlapping portions with the most extreme end pattern and the first most proximate pattern in a fifth layer, extracting data of a second most proximate pattern being most proximate to the non-overlapping pattern and converting the extracted data to the first layer.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 25, 2008
    Inventors: Takeshi Ito, Satoshi Tanaka, Toshiya Kotani, Tadahito Fujisawa, Koji Hashimoto
  • Patent number: 7426711
    Abstract: There is disclosed a mask pattern data forming method comprising arranging patterns with a minimum pitch in parallel or vertically in an X or Y direction, where directions diagonally connected with respect to respective centers of gravity of the double-pole or the quadrupole illumination are defined as the X and Y direction, classifying patterns or pattern groups with a pitch larger than the patterns with the minimum pitch into a pattern type with a pitch whose exposure margin is larger than that of the patterns with the minimum pitch and a pattern type with a pitch whose exposure margin is smaller than that of the patterns with the minimum pitch; and arranging patterns or pattern groups classified into the pattern type whose exposure margin is smaller than that of the patterns with the minimum pitch in a direction deflected by 45° or 135° from the patterns with the minimum pitch.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: September 16, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahito Fujisawa, Takeshi Ito, Takashi Obara
  • Publication number: 20080220377
    Abstract: A photo mask formed with patterns to be transferred to a substrate using an exposure apparatus, the photo mask comprising a pattern row having three or more hole patterns surrounded by a shielding portion or a semitransparent film and arranged along one direction, and an assist pattern surrounded by the shielding portion or semitransparent film and having a longitudinal direction and a latitudinal direction, the assist pattern being located at a specified distance from the pattern row in a direction orthogonal to the one direction, the longitudinal direction of the assist pattern being substantially parallel with the one direction, the longitudinal length of the assist pattern being equivalent to or larger than the longitudinal length of the pattern row, the assist pattern being not transferred to the substrate.
    Type: Application
    Filed: May 9, 2008
    Publication date: September 11, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Hashimoto, Tadahito Fujisawa, Yuko Kono, Takashi Obara
  • Patent number: 7396621
    Abstract: A method of manufacturing a semiconductor device includes preparing a projection exposure apparatus and a photomask, the photomask having a transparent substrate and a light shield film arranged in patterns to be transferred to a resist film on a wafer. The patterns include a circuit mask pattern, and first and second mark mask patterns having dimensions which change in accordance with exposure of the resist film.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: July 8, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahito Fujisawa, Soichi Inoue, Satoshi Tanaka, Masafumi Asano
  • Patent number: 7384712
    Abstract: A photo mask formed with patterns to be transferred to a substrate using an exposure apparatus, the photo mask comprising a pattern row having three or more hole patterns surrounded by a shielding portion or a semitransparent film and arranged along one direction, and an assist pattern surrounded by the shielding portion or semitransparent film and having a longitudinal direction and a latitudinal direction, the assist pattern being located at a specified distance from the pattern row in a direction orthogonal to the one direction, the longitudinal direction of the assist pattern being substantially parallel with the one direction, the longitudinal length of the assist pattern being equivalent to or larger than the longitudinal length of the pattern row, the assist pattern being not transferred to the substrate.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Tadahito Fujisawa, Yuko Kono, Takashi Obara
  • Publication number: 20080131599
    Abstract: A method of forming a coating film includes dropping a first chemical onto a substrate to be treated and rotating the substrate, thereby forming a first coating film, the first chemical being comprised of a solvent and a solid added to the solvent, baking the first coating film, dropping a second chemical onto a first-chemical poorly-coated region of the stationary substrate, thereby forming a second coating film, the second chemical being comprised of a solvent and a solid added to the solvent, drying the second coating film, and baking the second coating film.
    Type: Application
    Filed: November 15, 2007
    Publication date: June 5, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuhiko Sato, Tadahito Fujisawa, Kenji Hayashi, Yohei Ozaki
  • Patent number: 7368209
    Abstract: An method for evaluating sensitivity of a photoresist includes transferring an exposure dose monitor mark onto an inspection resist film with an inspection setting exposure dose using an exposure tool. Inspection sensitivity index varying according to the inspection setting exposure dose is measured, using an inspection transferred image of the exposure dose monitor mark delineated on the inspection resist film. An inspection photoresist sensitivity of the inspection resist film is calculated using sensitivity calibration data, based on the inspection sensitivity index.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eishi Shiobara, Kei Hayasaki, Tadahito Fujisawa, Shinichi Ito
  • Patent number: 7365830
    Abstract: There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: April 29, 2008
    Assignees: Kabushiki Kaisha Toshiba, Shin-Etsu Handotai Co., Ltd., Nikon Corporation
    Inventors: Tadahito Fujisawa, Soichi Inoue, Makoto Kobayashi, Masashi Ichikawa, Tsuneyuki Hagiwara, Kenichi Kodama
  • Publication number: 20080014510
    Abstract: A photomask designing apparatus designs a photomask provided with a light transmission region through which exposure light with a predetermined wavelength transmits, a semi-transmission region having an optical characteristic of 180-degree phase shift and a light shielding region shielding exposure light. The semi-transmission region has a width set so as to be larger as a distance from the semi-transmission region to the light shielding region becomes short with respect to a region in which the semi-transmission region, the light transmission region and the light shielding region are sequentially formed outward from an exposure light passing region side. The width of the semi-transmission region is set so as to be smaller as the distance becomes long.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 17, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tadahito FUJISAWA, Takeshi Ito, Yoshihiro Yanai, Atsushi Maesono, Kazuya Fukuhara
  • Publication number: 20070259280
    Abstract: A photomask transferring a light shield film pattern formed on a transparent substrate by a projection exposure apparatus, comprising a circuit pattern for transferring a predetermined pattern to a resist film, and an exposure monitor mark, the exposure monitor mark being formed in a manner that blocks having a predetermined width p, which are not resolved by the projection exposure apparatus, are intermittently or continuously arrayed along one direction, light shield and transmission portions are arrayed along one direction in each of the blocks, the blocks are arrayed so that a dimension ratio of the light shield and transmission portions of the blocks simply changes and the phase difference of exposure light passing through adjacent light transmission portions is approximately 180°.
    Type: Application
    Filed: June 27, 2007
    Publication date: November 8, 2007
    Inventors: Tadahito Fujisawa, Soichi Inoue, Satoshi Tanaka, Masafumi Asano
  • Publication number: 20070195295
    Abstract: There is disclosed a mask pattern data forming method comprising arranging patterns with a minimum pitch in parallel or vertically in an X or Y direction, where directions diagonally connected with respect to respective centers of gravity of the double-pole or the quadrupole illumination are defined as the X and Y direction, classifying patterns or pattern groups with a pitch larger than the patterns with the minimum pitch into a pattern type with a pitch whose exposure margin is larger than that of the patterns with the minimum pitch and a pattern type with a pitch whose exposure margin is smaller than that of the patterns with the minimum pitch; and arranging patterns or pattern groups classified into the pattern type whose exposure margin is smaller than that of the patterns with the minimum pitch in a direction deflected by 45° or 135° from the patterns with the minimum pitch.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 23, 2007
    Inventors: Tadahito Fujisawa, Takeshi Ito, Takashi Obara
  • Publication number: 20070177126
    Abstract: There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 2, 2007
    Inventors: Tadahito Fujisawa, Soichi Inoue, Makoto Kobayashi, Masashi Ichikawa, Tsuneyuki Hagiwara, Kenichi Kodama
  • Publication number: 20070177127
    Abstract: There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 2, 2007
    Inventors: Tadahito Fujisawa, Soichi Inoue, Makoto Kobayashi, Masashi Ichikawa, Tsuneyuki Hagiwara, Kenichi Kodama
  • Patent number: 7250235
    Abstract: A focus monitor method comprising preparing a mask comprising a first and second focus monitor patterns and an exposure monitor pattern, the focus monitor patterns being used to form first and second focus monitor marks on a wafer, and the exposure monitor pattern being used to form exposure meters on the wafer, obtaining a exposure dependency of a relationship between a dimensions of the focus monitor marks and the defocus amount, forming the focus monitor marks and exposure monitor mark on the wafer, measuring a dimension of the exposure monitor mark to obtain an effective exposure, selecting a relationship between the dimensions of the focus monitor marks and the defocus amount corresponding to the effective exposure, measuring a dimensions of the first and second focus monitor marks, and obtaining a defocus amount in accordance with the measured dimensions of the focus monitor marks and the selected relationship.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: July 31, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kyoko Izuha, Masafumi Asano, Tadahito Fujisawa
  • Patent number: 7230680
    Abstract: There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: June 12, 2007
    Assignees: Kabushiki Kaisha Toshiba, Shin-Etsu Handotai Co., Ltd., Nikon Corporation
    Inventors: Tadahito Fujisawa, Soichi Inoue, Makoto Kobayashi, Masashi Ichikawa, Tsuneyuki Hagiwara, Kenichi Kodama
  • Publication number: 20070105028
    Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 10, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Asano, Tadahito Fujisawa, Satoshi Tanaka
  • Patent number: 7175943
    Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masafumi Asano, Tadahito Fujisawa, Satoshi Tanaka
  • Publication number: 20070005280
    Abstract: A photomask quality estimation system comprises a measuring unit, a latitude computation unit and an estimation unit. The measuring unit measures the mask characteristic of each of a plurality of chip patterns formed on a mask substrate. The latitude computation unit computes the exposure latitude of each chip pattern based on the mask characteristic. The estimation unit estimates the quality of each chip pattern based on the exposure latitude.
    Type: Application
    Filed: June 27, 2006
    Publication date: January 4, 2007
    Inventors: Yukiyasu Arisawa, Tadahito Fujisawa, Shoji Mimotogi
  • Publication number: 20060228636
    Abstract: A pattern layout for forming an integrated circuit includes a first device pattern, a second device pattern, and an auxiliary pattern. The first device pattern includes a line and a space alternately arrayed on a fixed pitch having regular intervals in a first direction. The second device pattern is disposed on the fixed pitch and separated from the first device pattern in the first direction. The second device pattern has a pattern width an odd-number times larger than the regular intervals of the fixed pitch, wherein the odd-number is set to be three or more. The auxiliary pattern is disposed on the fixed pitch and within the second device pattern and configured not to be resolved by light exposure.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 12, 2006
    Inventors: Hiromitsu Mashita, Tadahito Fujisawa, Minoru Inomoto, Koji Hashimoto, Yasunobu Kai
  • Patent number: 7108945
    Abstract: A photomask has a device pattern, which has an opening portion and a mask portion, and either a focus monitor pattern or an exposure dose monitor pattern, which has an opening portion and a mask portion and which has the same plane pattern shape as at least a partial region of a device pattern. The phase difference in transmitted exposure light between the opening portion and the mask portion of the focus monitor pattern is different from that between the opening portion and the mask portion of the device pattern. The opening portion of the exposure dose monitor pattern has a different exposure dose transmittance from that of the opening portion of the device pattern.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: September 19, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takumichi Sutani, Kyoko Izuha, Tadahito Fujisawa, Soichi Inoue