Patents by Inventor Tadanobu Ookubo

Tadanobu Ookubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7785926
    Abstract: A first semiconductor element is bonded on a substrate. A complex film formed of integrated dicing film and adhesive film is affixed on a rear surface of a semiconductor wafer which is to be second semiconductor elements, the dicing film having a thickness within a range of not less than 50 ?m nor more than 140 ?m and a room temperature elastic modulus within a range of not less than 30 MPa nor more than 120 MPa, and the adhesive film having a thickness of 30 ?m or more and a room temperature elastic modulus before curing within a range of not less than 500 MPa nor more than 1200 MPa. The semiconductor wafer together with the adhesive film is divided into the second semiconductor elements. The second semiconductor element is picked up from the dicing film to be bonded on the first semiconductor element.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: August 31, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yoshimura, Tadanobu Ookubo
  • Publication number: 20100062566
    Abstract: A first semiconductor element is bonded on a substrate. A complex film formed of integrated dicing film and adhesive film is affixed on a rear surface of a semiconductor wafer which is to be second semiconductor elements, the dicing film having a thickness within a range of not less than 50 ?m nor more than 140 ?m and a room temperature elastic modulus within a range of not less than 30 MPa nor more than 120 MPa, and the adhesive film having a thickness of 30 ?m or more and a room temperature elastic modulus before curing within a range of not less than 500 MPa nor more than 1200 MPa. The semiconductor wafer together with the adhesive film is divided into the second semiconductor elements. The second semiconductor element is picked up from the dicing film to be bonded on the first semiconductor element.
    Type: Application
    Filed: September 17, 2009
    Publication date: March 11, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yoshimura, Tadanobu Ookubo
  • Patent number: 7615413
    Abstract: A first semiconductor element is bonded on a substrate. A complex film formed of integrated dicing film and adhesive film is affixed on a rear surface of a semiconductor wafer which is to be second semiconductor elements, the dicing film having a thickness within a range of not less than 50 ?m nor more than 140 ?m and a room temperature elastic modulus within a range of not less than 30 MPa nor more than 120 MPa, and the adhesive film having a thickness of 30 ?m or more and a room temperature elastic modulus before curing within a range of not less than 500 MPa nor more than 1200 MPa. The semiconductor wafer together with the adhesive film is divided into the second semiconductor elements. The second semiconductor element is picked up from the dicing film to be bonded on the first semiconductor element.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: November 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yoshimura, Tadanobu Ookubo
  • Publication number: 20060226520
    Abstract: A first semiconductor element is bonded on a substrate. A complex film formed of integrated dicing film and adhesive film is affixed on a rear surface of a semiconductor wafer which is to be second semiconductor elements, the dicing film having a thickness within a range of not less than 50 ?m nor more than 140 ?m and a room temperature elastic modulus within a range of not less than 30 MPa nor more than 120 MPa, and the adhesive film having a thickness of 30 ?m or more and a room temperature elastic modulus before curing within a range of not less than 500 MPa nor more than 1200 MPa. The semiconductor wafer together with the adhesive film is divided into the second semiconductor elements. The second semiconductor element is picked up from the dicing film to be bonded on the first semiconductor element.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 12, 2006
    Inventors: Atsushi Yoshimura, Tadanobu Ookubo
  • Publication number: 20050205981
    Abstract: A stacked electronic part comprises a first electronic part which is adhered onto a circuit board via a first adhesive layer and a second electronic part which is adhered onto the first electronic part via a second adhesive layer. An insulating resin having a filling viscosity of 1 Pa·s or more and less than 1000 Pa·s or a photo-setting insulating resin is filled in the spaces below first bonding wires which are connected to the first electronic part. Thus, the occurrence of bubbles resulting from the resin non-filled portions below the wires can be prevented. Besides, the first electronic part and the second electronic part are adhered via an insulating resin layer having an adhering viscosity of 1 kPa·s or more and 100 kPa·s or less. Therefore, the occurrence of an insulation failure, a short circuit or the like resulting from a contact between the bonding wires of the lower electronic part and the upper electronic part can be prevented.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 22, 2005
    Inventors: Atsushi Yoshimura, Tadanobu Ookubo, Yoshiaki Sugizaki, Susumu Harada