Abstract: Provided is a novel technique for improving the efficiency of and simplifying evaluation of enterprise activities dealing with environmental management.

Abstract: An identification information transmitter encrypts identification information for identifying a person or an object using an encryption key, transmits the encrypted identification information, and, after receiving another encryption key, switches the encryption key from the encryption key to the other encryption key. A server receives the encrypted identification information from the identification information transmitter, determines whether the encryption key is to be switched, and, if the encryption key is to be switched, generates the other encryption key. Another server authenticates the identification information that an identification information receiver receives from the identification information transmitter, and, if authentication is successful, acquires the other encryption key from the server, and transmits the other encryption key to the identification information receiver.

Abstract: An identification information transmitter encrypts identification information for identifying a person or an object using an encryption key, transmits the encrypted identification information, and, after receiving another encryption key, switches the encryption key from the encryption key to the other encryption key. A server receives the encrypted identification information from the identification information transmitter, determines whether the encryption key is to be switched, and, if the encryption key is to be switched, generates the other encryption key. Another server authenticates the identification information that an identification information receiver receives from the identification information transmitter, and, if authentication is successful, acquires the other encryption key from the server, and transmits the other encryption key to the identification information receiver.

Abstract: An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock.

Abstract: An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock.

Abstract: An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock.

Abstract: An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock.

Abstract: A first counter measures the span of the start bit of a first character of an AT command transmitted from a DTE based on instructions from an MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock. A shift register receives data subsequent to the start bit of the first character based on the sampling clock from the second register, holds the received data, which data is then read by the MPU.

Abstract: A quantization device includes a multiplying unit for multiplying one of n.times.n values of quantization matrix information by a selected scale factor so as to provide quantization basis information.The n.times.n values correspond to n.times.n pixels of a process block. These values are used as threshold values for quantization. A quantization operation unit for carrying out a quantization process on one of n.times.n orthogonal transformation coefficients uses the quantization basis information to provide a quantization coefficient, and a scale factor supplying unit for providing the noted one of the scale factors for the multiplying unit for using process location information which indicates a location in n.times.n matrix of the noted one of the n.times.n orthogonal transformation coefficients.

Abstract: In S2, to-be-compressed image data is encoded and thus compressed each time when using a respective one of a plurality of templates. In S4, compression rates of encoded data are compared with each other which encoded data was encoded each time when a respective one of the plurality of templates was used in S2. In S6, encoded data having the highest compression rate and template identification information of a template used when the encoded data having the highest compression rate was obtained in S2 are output. The encoding comprises entropy encoding. The to-be-compressed data comprises video game software programs.

Abstract: An address generating circuit generates addresses. A decoder reads compressed data from a recording medium according to the addresses supplied by the address generating circuit and decodes thus-read data. An address switching circuit selects one of an address supplied by the address generating circuit and an address supplied from an external address bus. A data switching circuit selects one of data supplied from the recording medium and data supplied by the decoder. The decoder circuits enters one of a through mode and a decoding mode, input data being output as it is in the through mode, input compressed data being decoded and the thus-decoded data being output in the decoding mode.

Abstract: An entropy encoder includes: a memory for storing a code table in a compressed data format in which continuing digits "1" that continue successively from the most significant bit of a code word for a predetermined number of bits are removed, together with a control code indicative of the type of the original code word, and a code word restoring unit for restoring the original code word from the compressed code word by supplementing a predetermined number of digits "1" to the compressed code word according to the type of the original code word.