Patents by Inventor Tadanori Suto

Tadanori Suto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8772944
    Abstract: A semiconductor substrate includes a via-hole that extends from a first surface to a second surface. An electrode pad layer that serves as the bottom of the via-hole is disposed on the second surface. An insulating layer is formed on the first surface of the semiconductor substrate and the sidewall of the via-hole. A metal layer is formed on the first surface of the semiconductor substrate and the sidewall of the via-hole with the insulating layer interposed therebetween and is directly formed on the bottom of the via-hole. An inclined surface is formed on the sidewall of the via-hole such that the bottom of the via-hole has a smaller opening size than the open end of the via-hole. The inclined surface has asperities.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: July 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadanori Suto
  • Publication number: 20120175781
    Abstract: A semiconductor substrate includes a via-hole that extends from a first surface to a second surface. An electrode pad layer that serves as the bottom of the via-hole is disposed on the second surface. An insulating layer is formed on the first surface of the semiconductor substrate and the sidewall of the via-hole. A metal layer is formed on the first surface of the semiconductor substrate and the sidewall of the via-hole with the insulating layer interposed therebetween and is directly formed on the bottom of the via-hole. An inclined surface is formed on the sidewall of the via-hole such that the bottom of the via-hole has a smaller opening size than the open end of the via-hole. The inclined surface has asperities.
    Type: Application
    Filed: January 5, 2012
    Publication date: July 12, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Tadanori Suto
  • Patent number: 7125810
    Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: October 24, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
  • Publication number: 20050067713
    Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.
    Type: Application
    Filed: October 15, 2004
    Publication date: March 31, 2005
    Inventors: Tadayoshi Mutta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
  • Patent number: 6856023
    Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: February 15, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
  • Publication number: 20030151144
    Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.
    Type: Application
    Filed: January 22, 2003
    Publication date: August 14, 2003
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
  • Patent number: 6342321
    Abstract: A method of drying a resinous composition layer, comprises the steps of coating a resinous composition over a substrate and drying the resinous composition layer to be dried. The drying method is a vacuum dry. And a drying condition in that case is such that an exhaustion is performed taking over 6 sec. till a degree of vacuum comes to 100 Torr.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: January 29, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichi Sakamoto, Nagato Osano, Tadanori Suto, Kenichi Iwata
  • Patent number: 6067439
    Abstract: A delivery member has a substrate material, a first coating film containing a filler and formed by electrodeposition on a substrate material, and a second coating film composed of an organic coating film formed on the first coating film.
    Type: Grant
    Filed: December 3, 1992
    Date of Patent: May 23, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Susumu Kadokura, Naoki Shirai, Shigeru Yoshimura, Tomoaki Kato, Yoshiaki Tomari, Tadanori Suto
  • Patent number: 5523833
    Abstract: A delivery member has a substrate and, provided thereon, an eletro-deposition coating film containing an organic powder. By this configuration, a delivery member having a homogeneous coating is formed. Stress is therefore uniformly distributed and the coating is resistant to wear. The delivery member can be made in a variety of different forms and can be used in many different types of apparatus.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: June 4, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiaki Tomari, Susumu Kadokura, Tomoaki Kato, Tadanori Suto