Patents by Inventor Tadao Ino

Tadao Ino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7952074
    Abstract: A circuit pattern inspection method and an apparatus therefore, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined changed state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: May 31, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20080302964
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined changed state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Application
    Filed: August 12, 2008
    Publication date: December 11, 2008
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 7417444
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: August 26, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 7263053
    Abstract: An information recording method and information recording apparatus is capable of resolving the trade-off relation between recording density and transmittance, wherein either the reproduction (playback) signal quality or the recording sensitivity is lowered. For this purpose, a voltage is applied by way of ball bearings or slip rings to a specified layer of a medium having multiple layers. The light transmittance of the recording layer is changed by application of this voltage. The tradeoff relationship between recording density and transmittance is eliminated thereby, and the recording density and transmittance levels are both improved, so as to enhance the recording reliability.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: August 28, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Terao, Katsuhiko Yamaguchi, Tadao Ino, Kyoko Kojima, Harukazu Miyamoto, Takeshi Maeda, Yuko Tsuchiya
  • Patent number: 7026830
    Abstract: To make possible the in-line inspection of a pattern of an insulating material. A patterned wafer 40 formed with a pattern by a resist film is placed on a specimen table 21 of a patterned wafer inspection apparatus 1 in opposed relation to a SEM 3. An electron beam 10 of a large current is emitted from an electron gun 11 and the pattern of the patterned wafer is scanned only once at a high scanning rate. The secondary electrons generated by this scanning from the patterned wafer are detected by a secondary electron detector 16 thereby to acquire an electron beam image. Using this electron beam image, the comparative inspection is conducted on the patterned wafer through an arithmetic operation unit 32 and a defect determining unit 33. Since an electron beam image of high contrast can be obtained by scanning an electron beam only once, a patterned wafer inspection method using a SEM can be implemented in the IC fabrication method.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: April 11, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20060043982
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Application
    Filed: November 9, 2005
    Publication date: March 2, 2006
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20050007936
    Abstract: An information recording method and information recording apparatus is capable of resolving the trade-off relation between recording density and transmittance, wherein either the reproduction (playback) signal quality or the recording sensitivity is lowered. For this purpose, a voltage is applied by way of ball bearings or slip rings to a specified layer of a medium having multiple layers. The light transmittance of the recording layer is changed by application of this voltage. The tradeoff relationship between recording density and transmittance is eliminated thereby, and the recording density and transmittance levels are both improved, so as to enhance the recording reliability.
    Type: Application
    Filed: April 6, 2004
    Publication date: January 13, 2005
    Inventors: Motoyasu Terao, Katsuhiko Yamaguchi, Tadao Ino, Kyoko Kojima, Harukazu Miyamoto, Takeshi Maeda, Yuko Tsuchiya
  • Publication number: 20030169060
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is radiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Application
    Filed: March 6, 2003
    Publication date: September 11, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 6559663
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with: the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: May 6, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20020027440
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is radiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Application
    Filed: October 25, 2001
    Publication date: March 7, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 6329826
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: December 11, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 6172363
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: January 9, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Patent number: 6104734
    Abstract: In order to eliminate noise of a solid state laser apparatus generating a blue light wave, the solid state laser apparatus comprises a solid state laser light source, an optical modulator having a light modulating function and outputting the modulated light therefrom as a desired light output, a photo-detector converting one part of output light from the solid state laser light source to an electrical signal, an electrical circuit detecting a noise component from the electrical signal and moving the phase of an electrical signal corresponding to the noise component, and a controller for applying the output signal of the electrical circuit to the optical modulator so as to substantially eliminate light of the blue light wave corresponding to the noise component so as to provide the desired light output from the optical modulator.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: August 15, 2000
    Assignees: Hitachi, Ltd., Hitachi Metals, Ltd.
    Inventors: Tadao Ino, Hirofumi Sukeda, Hideki Saga, Hiroshi Toyama, Tsuyoshi Miyai