Patents by Inventor Tadao Kikuchi

Tadao Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4336419
    Abstract: A construction for mounting plate-like electric parts within insertion holes formed in a printed circuit board is described which has additional holes for releasing any gases formed by soldering the parts to the printed circuit board. These additional holes are formed contiguous with said insertion holes at positions spaced away from any electrodes of the plate-like electric parts.
    Type: Grant
    Filed: July 14, 1980
    Date of Patent: June 22, 1982
    Assignee: Alps Electric Co., Ltd.
    Inventors: Yoichi Wakayama, Tadao Kikuchi
  • Patent number: 4031410
    Abstract: In a three-state discernment circuit, a signal including alternately recurring logic 0 and 1 levels is applied to a predetermined terminal to be suitably processed for discerning three different states. The signal including the logic 0 and 1 levels is applied to the predetermined terminal through a high output impedance circuit, and predetermined gate circuits are discerned in accordance with a power source potential condition, an opened condition and a round potential condition of the predetermined terminal.
    Type: Grant
    Filed: June 22, 1976
    Date of Patent: June 21, 1977
    Assignee: Hitachi, Ltd.
    Inventor: Tadao Kikuchi
  • Patent number: 4027173
    Abstract: An input gate circuit of a semiconductor integrated circuit composed of insulated gate field-effect transistors, comprises a driving transistor and a load transistor which form an inverter, a transistor which prevents the input of the integrated circuit from being opened, and resistance means to protect the transistors. A first resistance is connected in series between an input terminal and the gate of the driving transistor, while another resistance is connected between the input terminal and one end of the input opening preventing transistor whose other end is connected to a power supply terminal.
    Type: Grant
    Filed: November 21, 1975
    Date of Patent: May 31, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Kosei Nomiya, Tadao Kikuchi
  • Patent number: 3983420
    Abstract: A signal generator circuit which assumes a certain prescribed value upon closure of a power supply and which is inverted upon lapse of a predetermined time after the closure of the power supply, comprising first and second flip-flops adapted to be firstly stabilized to one value upon the energization of the power supply, a logical product circuit, and memory means provided at one input of the logical product circuit, a first periodic pulse signal being applied to an inversion input terminal of the first flip-flop, an inversion output signal of the first flip-flop being written into the memory means in synchronism with a second periodic pulse signal different in phase from the first periodic pulse signal, the first periodic pulse signal being applied to the other input of the logical product circuit, an output of the logical product circuit being applied to an inversion input terminal of the second flip-flop, an inversion output signal of the second flip-flop being used as an output signal of the signal genera
    Type: Grant
    Filed: August 28, 1975
    Date of Patent: September 28, 1976
    Assignee: Hitachi, Ltd.
    Inventor: Tadao Kikuchi