Abstract: A data signal reproducing apparatus reproduces digital data from a recording medium on which a digital data signal modulated in accordance with the run length limited code modulation is recorded together with a synchronous signal. The apparatus is improved so that erroneous detection of a false synchronous signal is avoided when there is a defective part on the recording surface of the recording medium. In the apparatus, a reproduced signal of rectangular waveform from waveform shaping means (9) is prevented from being supplied to reproduced signal processing means (13) when the amplitude of a head output signal detected by amplitude detecting means (14 to 17) is less than a predetermined value, thereby avoiding erroneous detection of the false synchronous signal. The apparatus is suitable for being constituted to be a player for a digital audio disc.

Abstract: A tracking control arrangement for use in an optical disc player comprises a photodetecting assembly including a plurality of photodetecting elements each provided for receiving a light beam caused to impinge on an optical disc to read an information signal recorded in a record track thereon and reflected thereat and for producing an output in response to the received light beam, an operational circuit operative to generate from the outputs of the photodetecting elements a reproduced information signal and a resultant signal varying in phase relative to the reproduced information signal in response to the direction of deviation of a beam spot formed on the optical disc by the light beam from the center of the record track and varying in amplitude in response to the amount of the deviation, an error signal generating circuit operative to generate a tracking error signal in the form of voltage held by voltage holding means on the basis of both the reproduced information signal and the resultant signal obtained

Abstract: An apparatus for reproducing information signals recorded in spiral or coaxial tracks of a record disc includes a pick-up device operative, upon scanning of a track of the disc while the latter is rotated, to reproduce the information signals recorded in the scanned track; a driver for rotating the record disc relative to the pick-up device; a tracking device for controlling the tracing of the tracks by the pick-up device; a transporting device for bodily moving the pick-up device in a radial direction in respect to the axis of rotation of the record disc and thereby normally determining the tracks to be scanned by the pick-up device; and a controller selectively operative for causing the pick-up device to intermittently trace nonadjacent groups of tracks so as to intermittently reproduce the information signal recorded in the nonadjacent groups of tracks, respectively.

Abstract: A method of moving a pick-up device of an optical reproducing apparatus to a position corresponding to a desired address of a record disk, the record disk having an information signal and an address signal recorded in an information area thereon, comprising the steps of producing a desired address signal corresponding to the desired address; partitioning the information area into radially partitioned information sections; moving the pick-up device to a position between two adjacent radially partitioned information sections at a speed faster than normal reproducing speed; reproducing the address signal at the last position of the pick-up device; comparing the reproduced address signal at the last position with the desired address signal; further moving the pick-up device in a direction and an amount determined by the comparing step to a position between two adjacent radially partitioned information sections and within one of the radially partitioned information sections between which the pick-up device was las

Abstract: In an apparatus for reproducing digitized signals recorded in successive, substantially circular tracks on a rotated disc by means of a pickup of the optical type which, in a normal scanning state, scans the tracks in succession; a first or prepare-to-play command signal causes the pickup to reproduce the digitized signals for a predetermined interval corresponding to more than one of the tracks on the disc starting from a desired position on such one track and the digitized signals reproduced in that predetermined interval are stored, desirably in a random access memory (RAM), whereupon a standby state of the pickup is established in which the pickup traces a closed loop on the rotated disc within a range corresponding to the previously mentioned predetermined interval.

Abstract: An apparatus for playing information recorded on a disc in substantially circular tracks on the latter includes a device for rotating the disc; a pickup for reproducing the information recorded on the disc; a tracking control circuit for adjusting the tracking position of the pickup in forward and reverse transverse directions with respect to the tracks; and a circuit operative through the tracking control circuit for selectively establishing a slow-playback mode and a reverse slow-playback mode in each of which, after the pickup reproduces a respective first predetermined number of the tracks while moving in the forward transverse direction, the tracking position of the pickup is moved in the reverse transverse direction a respective second predetermined integral number of tracks, the second predetermined number of tracks being less than twice the first predetermined number of tracks.

Abstract: A servo system for use with apparatus for reproducing a disk on which PCM pulse code modulation signals have been modulated by a run length limited code and which are recorded at a constant linear velocity and the circuit detects the length of a period during which a playback signal is inverted and produces an output corresponding to the detected length and has a peak value hold circuit for maintaining a peak value of the output and a bottom value hold circuit at a later stage of the peak value hold circuit which has a time constant which is larger than the charging time constant of the peak value hold circuit so as to produce an output which follows the output of the peak value hold circuit.

Abstract: A digital gain control apparatus includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal. A shift register is supplied with the plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator. A latch circuit is connected to the output of the shift register and is supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals. A decoder is connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals. A function selector circuit and a volume adjusting circuit for the selected functions is also provided, each being controlled by the plurality of control signals. The shift register, latch circuit and volume adjusting circuit are formed in one chip-integrated circuit.

Abstract: A pulse width modulated signal amplifier includes a first DC voltage source having first and second terminals, first and second switching transistors each having a control electrode, the main current path of which is connected in series between the first and second terminals of the first DC voltage source, the connection point of which is connected to an output terminal, a signal input circuit for supplying a pulse width modulated signal to the control electrodes of the first and second switching transistors, a low pass filter having an input connected to the output terminal and an output to be connected to a load, a second DC voltage source having first and second terminals, the output voltages of which are lower than those of the first and second terminals of the first DC voltage source, a first circuit including a first diode and connected between the first terminal of the second DC voltage source and the output terminal, and a second circuit including a second diode connected between the second terminal o

Abstract: A control circuit for an inverter includes a DC voltage source having first and second terminals, an input transformer having a primary winding, a pair of secondary windings and a magnetic core, an output transformer having a primary winding, a secondary winding and a feedback winding, first and second transistors each having a control electrode, the main current paths of which are connected, through the primary winding of the output transformer, between the first and second terminals of the DC voltage source and the control electrodes of which are connected to the pair of secondary windings of the input transformer, coupling circuit for connecting the primary winding of the input transformer to the feedback winding of the output transformer, a starting circuit for putting one of the first and second transistors in its conductive state when the DC voltage source is operated, and a control circuit including at least a shorting winding provided in connection with the magnetic core of the input transformer so as

Abstract: A switching circuit with MOS field effect transistors includes a DC voltage source having first and second terminals, first and second MOS field effect transistors each having gate, source, drain electrodes and a substrate, a circuit for connecting the source and drain electrodes of the first and second field MOS effect transistors in push-pull amplifying relation between the first and second terminals of the DC voltage source, a signal input circuit for supplying a signal to drive the gate electrodes of the first and second MOS field effect transistors, an output circuit including an inductor and a load connected in series between the connection point of the first and second MOS field effect transistors and a reference point so that charging and discharging currents of the inductor flow alternately through the source and drain electrodes of each of the first and second MOS field effect transistors when the respective MOS field effect transistors are in their conductive state, and resistors connected between

Abstract: A MOS-type FET (field effect transistor) amplifier includes a pair of P-channel and N-channel output stage MOS-type FETs which are ON-OFF controlled by a pulse signal and an inductive load. Each reverse current caused by the inductive load is shunted by a diode connected between the drain and source of each of the MOS-type FETs. An additional pair of diodes are provided in the drain-source circuits of the MOS-type FETs so as to prevent each reverse current flowing through respective substrates of the MOS-type FETs.

Abstract: A pulse signal amplifier is disclosed which includes at least an emitter follower type drive stage consisting of a pair of complementary transistors and a field effect transistor connected to the drive stage and ON/OFF controlled thereby. A capacitive element is connected between the collectors of the complementary transistors and a pulse current signal source is provided to supply a charge current to the capacitive element and a drive current to the complementary transistors.

Abstract: A PWM (pulse width modulated) signal power amplifier includes an input terminal supplied with a PWM signal directly, an integrator, a zero-cross switch and a pulse amplifier. A negative feedback circuit is provided between the input of the integrator and the output of the pulse signal amplifier so as to provide a low distortion in spite of the voltage fluctuations in the operating voltage to the pulse amplifier.

Abstract: A pulse signal amplifier includes a pair of complementary drive transistors and a pair of complementary output transistors, each being connected in an emitter-follower circuit to supply an amplified pulse signal to an inductive load. A leakage current from said inductive load is prevented from flowing to the base-emitter circuit of the output transistor by a current limiting circuit.

Abstract: An amplifier comprises a signal amplifying circuit connected between a signal input terminal and a signal output terminal, a DC power supply, a voltage regulating circuit connected between the DC power supply and the amplifying circuit, a muting circuit connected between the amplifying circuit and the output terminal, and a detecting circuit for detecting a voltage difference between the input and output of the voltage regulating circuit and correspondingly controlling the muting circuit to mute the output signal from the amplifying circuit when the detected voltage difference becomes less than a predetermined value, for example, when the DC power supply is turned-off.

Abstract: An overload detecting circuit for a PWM amplifier includes an output current detecting circuit and an output voltage detecting circuit. The output of the output voltage detecting circuit is supplied to a rectifying circuit having a discharge time constant determined by the cut-off frequency of a low pass filter as a demodulator of the PWM amplifier. A comparison circuit is provided to produce an overload indicative signal in response to the comparison result between the outputs of the rectifying circuit and of the output current detecting circuit.

Abstract: A pulse width modulated signal amplifier comprises a DC power supply for rectifying an AC input voltage to produce a pair of DC voltages of opposite polarity, a pulse width modulated signal amplifying circuit supplied with a pulse width modulated signal to produce a demodulated signal through a low pass filter, and a detecting circuit responsive to an abnormal level of the DC voltages to produce a detecting signal when a smoothing condenser of the DC power supply is overcharged by a current flowing through the low pass filter in one direction. Such detecting signal is desirably employed to prevent the appearance of the output signal from the pulse width modulated amplifying circuit.

Abstract: An amplifier comprised of a field effect transistor whose gate electrode is adapted to receive an input signal. An impedance converter couples the input signal to the gate electrode of the field effect transistor, the impedance converter being formed of n impedance converting stages, each stage having a relatively low output impedance. A voltage limiting circuit is connected between the source of input signal and the gate electrode of the field effect transistor so as to limit the forward biasing of the field effect transistor. This voltage limiting circuit includes m voltage-limiting elements, wherein n and m are integers (1, 2, 3, . . . ) and n is equal to or greater than m. In a preferred embodiment, the amplifier is formed of two field effect transistors connected in push-pull relation, each field effect transistor being provided with an impedance converter and a voltage-limiting circuit as described above.

Abstract: A pulse amplifier formed of first and second field effect transistors, each exhibiting an inherent input capacitance at its gate electrode, the field effect transistors being connected in push-pull relation whereby their drain or source electrodes are connected to a common output terminal. First and second resistive circuits are connected in a pulse supply circuit to supply pulse signals to the respective gate electrodes of the field effect transistors. Each of the resistive circuits exhibits a higher resistance when a pulse is supplied therethrough to turn the respective field effect transistor ON and a lower resistance when the pulse is terminated to turn the respective field effect transistor OFF.